SLVSCI4B February 2014 – September 2014 TPS22961
PRODUCTION DATA.
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The device is a 3.5 V, 6 A load switch in a 8-terminal SON package. To reduce voltage drop for low voltage and high current rails, the device implements an ultra-low resistance N-channel MOSFET which reduces the drop out voltage through the device at very high currents.
The device has a controlled, yet quick, fixed slew rate for applications that require quick turn-on response. During shutdown, the device has very low leakage currents, thereby reducing unnecessary leakages for downstream modules during standby. Integrated control logic, driver, and output discharge FET eliminates the need for any external components, which reduces solution size and BOM count.
The ON terminal controls the state of the load switch, and asserting the terminal high (active high) enables the switch. The ON terminal is compatible with standard GPIO logic threshold and can be used with any microcontroller or discrete logic with 1.2 V or higher GPIO voltage. This terminal cannot be left floating and must be tied either high or low for proper functionality.
To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1 µF ceramic capacitor, CIN, placed close to the terminals, is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop in high-current application. When switching heavy loads, it is recommended to have an input capacitor 10 times higher than the output capacitor to avoid excessive voltage drop.
Due to the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current flow through the body diode from VOUTT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip caused by inrush currents during startup, however a 10 to 1 ratio for capacitance is not required for proper functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause a VIN dip upon turn-on due to inrush currents.
For optimal RON performance, make sure VIN ≤ (VBIAS – 1.95 V). For example, in order to have VIN = 3.5V, VBIAS must be 5.5 V. The device will still be functional if VIN > (VBIAS – 1.95 V) but it will exhibit RON greater than what is listed in the Electrical Characteristics, VBIAS = 5.0 V table. See Figure 25 for an example of a typical device. Notice the increasing RON as VIN increases. Be sure to never exceed the maximum voltage rating for VIN and VBIAS.