JAJSRB8A September   2023  – November 2023 TPS22999

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics (VBIAS = 5.5 V)
    6. 5.6  Electrical Characteristics (VBIAS = 3.4 V)
    7. 5.7  Electrical Characteristics (VBIAS = 2.3 V)
    8. 5.8  Switching Characteristics
    9. 5.9  Timing Diagrams
    10. 5.10 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 ON and OFF Control
      2. 6.3.2 Regulated Inrush Current
      3. 6.3.3 Integrated Quick Output Discharge
      4. 6.3.4 Thermal Shutdown
      5. 6.3.5 Power-Good (PG) Signal
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.5 Power-Good (PG) Signal

The TPS22999 device has a Power-Good (PG) output signal to indicate the gate of the pass FET is driven high and the switch is on with the on-resistance close to final value (full load ready). The signal is an active low and open drain output which can be connected to a voltage source through an external pullup resistor, RPU. This voltage source can be VOUT from the TPS22999 device or another external voltage. VBIAS is required for PG to have a valid output.