8.3.3 Timer

Timer is a critical feature in the hot swap, which manages the stress level in the MOSFET. The timer will source and sink current into the timer capacitor as follows:

• Not in current limit: sink 2 µA
• If the part is in current limit and V_GATE < V_GATE,TH, the timer sources current as follows:
  • V_D < V_{D,CL_SW}: source 10 µA
  • V_D > V_{D,CL_SW}: source 50 µA

The TPS23525 times out and shuts down the hot swap as follows.

• If V_D < V_{D,TMR_SW} then the hot swap times out when V_TMR reaches 1.5 V.
• If V_D > V_{D,TMR_SW} then the hot swap times out when V_TMR reaches 0.75 V.

The above behavior maximizes the ability of the hot swap to ride out voltage steps, while ensuring that the FET remains safe even if the part can not ride out a voltage step.

A cool down period follows after the part times out. During this time the timer performs the following:

• Discharge C_TMR with a 2-µA current source until 0.5 V
• Charge C_TMR with a 10-µA current source until it is back to 1.5 V.
• Repeat the above 64 times
• Discharge timer to 0 V.

The part attempts to restart after finishing the above. If the UVEN signal is toggled while the 64 cycles are in progress the part restarts immediately after the 64 cycles are completed.

The timer operates as follows when recovering from POR:

• If V_TMR < 0.5 V:
  • Proceed to regular startup
  • Do not discharge V_TMR
• If V_TMR > 0.5 V:
  • Go through 64 charge/discharge cycles
  • Discharge V_TMR
  • Proceed to startup

The Time Out (T_TO) can be computed using the equations below. Note that the time out depends on the V_DS of the MOSFET.

Equation 7.

Equation 8.

Equation 9.

Equation 10.