SLUSC25A February 2015 – August 2017 TPS2388
PRODUCTION DATA.
The TPS2388 features a 3-wire I2C interface, using SDAI, SDAO, and SCL. Each transmission includes a Start condition sent by the master, followed by the device address (7-bit) with R/W bit, a register address byte, then one or two data bytes and a Stop condition. The recipient also sends an acknowledge bit following each byte transmitted. Also, SDAI/SDAO is stable while SCL is high except during a Start or Stop condition.
Figure 19 and Figure 20 illustrate read and write operations through I2C interface, using configuration A or B (see Table 19 for more details). The 'parametric' read operation is applicable to A/D conversion results. The TPS2388 also features quick access to the latest addressed register through I2C bus. This means that when a Stop bit is received, the register pointer is not automatically reset.
It is also possible to perform a write operation to many TPS2388 devices at the same time. The slave address during this broadcast access is 0x7F, as shown in Pin Status Register. Depending on which configuration (A or B) is selected, a global write proceeds as following: