JAJS440B November   2009  – December 2016 TPS2556 , TPS2557

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Overcurrent Conditions
      2. 9.3.2 FAULT Response
      3. 9.3.3 Undervoltage Lockout (UVLO)
      4. 9.3.4 Enable (EN OR EN)
      5. 9.3.5 Thermal Sense
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Current-Limiting Power-Distribution Switch
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Input and Output Capacitance
          2. 10.2.1.2.2 Programming the Current-Limit Threshold
            1. 10.2.1.2.2.1 Designing Above a Minimum Current Limit
            2. 10.2.1.2.2.2 Designing Below a Maximum Current Limit
            3. 10.2.1.2.2.3 Accounting for Resistor Tolerance
          3. 10.2.1.2.3 Auto-Retry Functionality
          4. 10.2.1.2.4 Two-Level Current-Limit Circuit
        3. 10.2.1.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 関連リンク
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

12 Layout

12.1 Layout Guidelines

  • TI recommends placing the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low-inductance trace.
  • TI recommends placing a high-value electrolytic capacitor and a 100-nF bypass capacitor on the output pin when large transient currents are expected on the output.
  • The traces routing the RILIM resistor to the device must be as short as possible to reduce parasitic effects on the current limit accuracy.
  • The PowerPAD must be directly connected to PCB ground plane using wide and short copper trace.

12.2 Layout Example

TPS2556 TPS2557 layout_slvs931.gif Figure 25. TPS255x Layout Example

12.3 Thermal Considerations

The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It is good design practice to estimate power dissipation and junction temperature. This analysis gives an approximation for calculating junction temperature based on the power dissipation in the package. However, thermal analysis is strongly dependent on additional system level factors. Such factors include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating power. Good thermal design practice must include all system level factors in addition to individual component analysis.

Begin by determining the rDS(ON) of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(ON) from the typical characteristics graph. Using this value, the power dissipation can be calculated by Equation 8.

Equation 8. PD = rDS(ON) × IOUT2

where

  • PD = Total power dissipation (W)
  • rDS(ON) = Power switch on-resistance (Ω)
  • IOUT = Maximum current-limit threshold (A)

Finally, calculate the junction temperature with Equation 9.

Equation 9. TJ = PD × RθJA + TA

where

  • TA = Ambient temperature (°C)
  • RθJA = Thermal resistance (°C/W)
  • PD = Total power dissipation (W)

Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat the calculation using the refined rDS(ON) from the previous calculation as the new estimate. Two or three iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on thermal resistance, and thermal resistance is highly dependent on the individual package and board layout.