JAJSJN7A
June 2014 – November 2020
TPS2559
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Timing Diagrams
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Thermal Sense
8.3.2
Overcurrent Protection
8.3.3
FAULT Response
8.4
Device Functional Modes
8.4.1
Operation with VIN Undervoltage Lockout (UVLO) Control
8.4.2
Operation with EN Control
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Step-by-Step Design Procedure
9.2.2.2
Input and Output Capacitance
9.2.2.3
Programming the Current-Limit Threshold
9.2.2.4
Design Above a Minimum Current Limit
9.2.2.5
Design Below a Maximum Current Limit
9.2.2.6
Accounting for Resistor Tolerance
9.2.2.7
Power Dissipation and Junction Temperature
9.2.2.8
Auto-Retry
9.2.2.9
Two-Level Current-Limit
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DRC|10
MPDS117L
サーマルパッド・メカニカル・データ
DRC|10
QFND497B
発注情報
jajsjn7a_oa
jajsjn7a_pm