JAJSHY1E September 2019 – March 2022 TPS25840-Q1 , TPS25842-Q1
PRODUCTION DATA
The TPS2584x-Q1 has integrated NFET gate drivers, and can support current limit with external NFET. Refer to Figure 10-15.
The LS_GD pin of TPS2584x-Q1 can source 3-uA (typical) current to enhance the external MOSFET. A 6.2-V clamp between LS_GD and CSN/OUT pin limits the gate-to-source voltage. During DCDC start up, the LS_GD gate drivers begin to source current after VCSN/OUT reach 3 V. If the VCSN/OUT > 7.5 V or VBUS > 7 V is under overvoltage condition, the LS_GD turns off immediately with 35-uA (typical) sink current.
If load current above NFET current limit threshold, LS_GD also turns off the NFET after 2 ms (typical) and enters hiccup mode to protect NFET from thermal issue. Refer to Figure 11-24 for application waveform.
In real application, if VBUS short to VBAT function is needed, 20 V back-to-back NFET is suggested in circuit design.