JAJSN20 September 2021 TPS25854-Q1 , TPS25855-Q1
PRODUCTION DATA
Because the TPS2585x-Q1 integrates an USB current-limit switches, it provides adjustable current limit to prevent USB port overheating. The device engages the two-level current limit scheme, which has one typical current limit, IOS_BUS, and the secondary current limit, IOS_HI. The secondary current limit, IOS_HI, is 1.6 times the primary current limit, IOS_BUS. The secondary current limit acts as the current limit threshold for a deglitch time, tIOS_HI_DEG, then the USB power switch current limit threshold is set back to IOS_BUS. Equation 9 calculates the value of resistor for adjusting the typical current limit.
This equation assumes an ideal-no variation-external adjusting resistor. To take resistor tolerance into account, first determine the minimum and maximum resistor values based on its tolerance specifications and use these values in the equations. Because of the inverse relationship between the current limit and the adjusting resistor, use the maximum resistor value in the IOS(min) equation and the minimum resistor value in the IOS(max) equation. Table 10-2 lists the typical RILIM resistor value.
RILIM (KΩ) | IOS_BUS - Current Limit Threshold (mA) |
---|---|
19.1 | 1690 |
15.4 | 2096 |
11.5 | 2806 |
9.53 | 3386 |
Short to GND | 3550 |
For the normal application, it can short the ILIM pin to GND directly, which sets a default 3.55-A current limit with a maximum ±15% variation on each USB port to follow the Type-C specification. The TPS2585x-Q1 provides built-in soft-start circuitry that controls the rising slew rate of the output voltage to limit inrush current and voltage surges.
The secondary current limit, IOS_HI, allows the USB port pull out a larger current for a short time during transient overload conditions, which can bring benefits for USB port special overload testing like MFi OCP. In a normal application, once the device is powered on and USB port is not in UVLO, the USB port current limit threshold is overridden by the secondary current limit, IOS_HI, so the USB port can output as high as a 1.6 × IOS_BUS current for typically 2 ms. After the deglitch time, tIOS_HI_DEG, the current limit threshold is set back to the typical current with IOS_BUS. The secondary current limit threshold does not resume until after the tIOS_HI_RST deglitch time, which is typically 16 ms. If there is an inrush current higher than the IOS_HI threshold, the current limit is set back to IOS_BUS immediately, without waiting for a tIOS_HI_DEG.
The TPS2585x-Q1 responds to overcurrent conditions by limiting output current to IOS_BUS as shown in previous equation. When an overload condition occurs, the device maintains a constant output current and the output voltage reduces accordingly. Three possible overload conditions can occur:
The TPS2585x-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the previously mentioned cases. Thermal limiting turns off the internal NFET and starts when the NFET junction temperature exceeds 160°C (typical). The device remains off until the NFET junction temperature cools 10°C (typical) and then restarts. This extra thermal protection mechanism can help prevent further junction temperature rise, which can cause the device to turn off due to junction temperature exceeding the main thermal shutdown threshold, TSD.