JAJSC83E May   2016  – January 2021 TPS25940-Q1

PRODMIX  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parametric Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable and Adjusting Undervoltage Lockout
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and In-Rush Current Control
      4. 9.3.4 Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
        3. 9.3.4.3 Start-Up with Short on Output
        4. 9.3.4.4 Constant Current Limit Behavior During Overcurrent Faults
      5. 9.3.5 FAULT Response
      6. 9.3.6 Current Monitoring
      7. 9.3.7 Power Good Comparator
      8. 9.3.8 IN, OUT and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 DevSleep Mode
      2. 9.4.2 Shutdown Control
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step by Step Design Procedure
        2. 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.5.1 Case1: Start-Up Without Load: Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.5.2 Case 2: Start-Up With Load: Output Capacitance C(OUT) and Load Draws Current During Start-Up
        6. 10.2.2.6 Programing the Power Good Set Point
        7. 10.2.2.7 Support Component Selections—R6, R7 and CIN
      3. 10.2.3 Application Curves
      4. 10.2.4 System Examples
        1. 10.2.4.1 VBUS Short-to-Battery, Short-to-Ground Protection of USB Port in Automotive Systems
        2. 10.2.4.2 Power Failure Protection for Holdup Power
        3. 10.2.4.3 Overload Detection Using TPS25940xx-Q1
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 サポート・リソース
    3. 13.3 Trademarks
    4. 13.4 静電気放電に関する注意事項
    5. 13.5 用語集
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Power Failure Protection for Holdup Power

For certain applications, it is necessary to have hold-up circuit and capacitor bank to ensure that critical user data is never lost during power-failure to the drive. The power-failure event could be because of the momentary loss of power regulation (transient brown-out condition) or because of the loss of power when system is hot-plugged out.

The TPS25940xx-Q1 device continuously monitors the supply voltage at EN/UVLO pin and swiftly disconnects the input bus from output when the voltage drops below a predefined threshold (power fail detection). Reverse current flow from output side to input supply gets blocked when reverse voltage from IN to OUT exceeds –66 mV. In addition, it provides an instant warning signal ( FLT) to the controller. Its swift true reverse blocking feature reacts in 1 µs (typical) ensuring that the capacitor bank charge is retained. This helps the drive to have power for longer time to harden data and reduces the capacitance required in the hold-up bank, saving system cost.

The typical application diagram of TPS25940xx-Q1 usage for holdup power is shown in Figure 10-23.

GUID-A9702A8D-51BE-4792-8715-2E669D800844-low.gif
CIN: Optional and only for noise suppression.
Figure 10-23 Holdup Capacitor Implementation Using TPS25940xx-Q1

The oscilloscope plots demonstrating the true reverse blocking, fast turn-off and FLT signal delay are shown in Figure 10-24 through Figure 10-26.

GUID-0A19715D-4849-4039-BDA5-6A7FDCDCC58F-low.png
V(IN) = 12 VC(OUT) = 1500 µFRL = 5.6 Ω
Figure 10-24 Hot-Plug Out Condition
GUID-DE1A3501-F960-47E5-81F8-DDD378D0B779-low.png
V(IN) = 12 VC(OUT) = 1500 µFRL = 5.6 Ω
Figure 10-26 Standard Power Shutdown or Brownout Conditions
GUID-89FF1AF3-4AD3-4E83-9D94-E9B3AA58C814-low.png
V(IN) = 12 VC(OUT) = 1500 µFRL = 5.6 Ω
Figure 10-25 Hot-Plug Out Condition: FLT Delay