JAJSMF5 データシート

JAJSMF5B september 2022 – june 2023 TPS25990

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RQP|26
- MPQF569A

サーマルパッド・メカニカル・データ

発注情報

8.3.10.1 Fault Response and Indication (FLT)

Table 8-2 summarizes the device response to various fault conditions.

Table 8-2 Fault Summary

Event or Condition	Device Response	Fault Latched Internally	FLT Pin Status	Pin Indication Masking Option	Delay
Steady-state	None	N/A	H	N/A
Inrush	None	N/A	H	N/A
Overtemperature	Shutdown	Y	L	Y
Undervoltage (EN/UVLO)	Shutdown	N	H	N/A
Undervoltage (VDD UVP)	Shutdown	N	H	N/A
Undervoltage (VIN UVP)	Shutdown	N	H	N/A
Overvoltage (VIN OVP)	Shutdown	N	H	N/A
Transient overcurrent	None	N	H	N/A
Persistent overcurrent (steady-state)	Circuit-Breaker	Y	L	Y	t_ITIMER
Persistent overcurrent (start-up)	Current Limit	N	H	N/A
Output short-circuit	Fast-trip	Y	L	Y	t_FT
Output short-circuit (Fast recovery configuration)	Fast-trip followed by current limited Start-up	N	H	N/A
ILIM pin open (start-up)	Shutdown	Y	L	Y
ILIM pin short (start-up)	Shutdown (if I_OUT > I_{OC_BKP})	Y	L	Y
ILIM pin open (steady-state)	Active current sharing loop always active	N	H	N/A
ILIM pin short (steady-state)	Active current sharing loop disabled	N	H	N/A
IMON pin open (steady-state)	Shutdown	Y	L	Y
IMON pin short (steady-state)	Shutdown (If I_OUT > I_{OC_BKP})	Y	L	Y	45 μs
IREF pin open (start-up)	Shutdown (If I_OUT > I_{OC_BKP})	Y	L	Y
IREF pin open (steady-state)	Shutdown (if I_OUT > I_{OC_BKP})	Y	L	Y	t_ITIMER
IREF pin short (steady-state)	Shutdown	Y	L	Y
IREF pin short (start-up)	Shutdown	Y	L	Y
Start-up timeout	Shutdown	Y	L	N	t_{SU_TMR}
FET health fault (G-S)	Shutdown	Y	L	Y	10 μs
FET health fault (G-D)	Shutdown	Y	L	Y
FET health fault (D-S)	Shutdown	N	L	Y	t_{SU_TMR}
External fault (SWEN pulled low externally while device is not in UV or OV)	Shutdown	Y	L	Y
Comparator-1 fault	Configurable through DEVICE_CONFIG register	Y	L	Y
Comparator-2 fault	Configurable through DEVICE_CONFIG register	Y	L	Y

Note:

GPIO2 pin is configured as FLT by default to provide an active low fault indication. FLT is an open-drain pin and must be pulled up to an external supply. Refer to GPIO_CONFIG_12 register for more details and configuration options.

The device response after a fault varies based on the RETRY_CONFIG register setting. The device latches a fault as per the table above and thereafter follows an auto-retry or latch-off response. For auto-retry configuration, the latched faults also trigger the start of the Auto-Retry Timer, while keeping the FLT pin pulled low. On expiry of the timer period (t_RETRY), the FLT pin pull-down is released and the device is ready to restart automatically. When the device turns on again, it follows the usual DVDT limited start-up sequence.

The only exception to this is during Short-circuit fault when the device is configured for fast recovery using the SC_RETRY bit in the DEVICE_CONFIG register. In this case, the device turns off quickly and then automatically turns back on in a current limited manner. This allows the system to try and recover quickly from any transient faults. See Short-Circuit Protection section for more details.

For faults that are latched internally, power cycling the part or pulling the EN/UVLO pin voltage below V_SD(F) clears the fault and the FLT pin is de-asserted. This action also clears the Auto-retry timer. Pulling the EN/UVLO just below the UVLO threshold has no impact on the device in this condition. This is true in case of latch-off and auto-retry configurations.

In a parallel eFuse configuration involving TPS25990 and TPS25985x, the fault response is determined by the TPS25990 as the primary device. However, if the primary device fails to register a fault, there is a fail-safe mechanism in the secondary device to take control and turn off the entire chain by pulling the SWEN pin low and enter a latch-off condition. Thereafter, the device can be turned on again only by power cycling VDD below V_UVP(F) or by cycling EN/UVLO pin below V_SD(F).