JAJSEZ1D December   2015  – December 2019 TPS2H000-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの回路図
      2.      可変電流制限による容量性負荷の駆動
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Current and Voltage Conventions
      2. 8.3.2 Accurate Current Sense
      3. 8.3.3 Adjustable Current Limit
      4. 8.3.4 Inductive-Load Switching-Off Clamp
      5. 8.3.5 Fault Detection and Reporting
        1. 8.3.5.1 Diagnostic Enable Function
        2. 8.3.5.2 Multiplexing of Current Sense
        3. 8.3.5.3 Fault Table
        4. 8.3.5.4 STx and FAULT Reporting
      6. 8.3.6 Full Diagnostics
        1. 8.3.6.1 Short-to-GND and Overload Detection
        2. 8.3.6.2 Open-Load Detection
          1. 8.3.6.2.1 Channel On
          2. 8.3.6.2.2 Channel Off
        3. 8.3.6.3 Short-to-Battery Detection
        4. 8.3.6.4 Reverse Polarity Detection
        5. 8.3.6.5 Thermal Fault Detection
          1. 8.3.6.5.1 Thermal Shutdown
      7. 8.3.7 Full Protections
        1. 8.3.7.1 UVLO Protection
        2. 8.3.7.2 Loss-of-GND Protection
        3. 8.3.7.3 Protection for Loss of Power Supply
        4. 8.3.7.4 Reverse-Current Protection
        5. 8.3.7.5 MCU I/O Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Working Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
      1. 11.2.1 Without a GND Network
      2. 11.2.2 With a GND Network
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.7 Typical Characteristics

TPS2H000-Q1 D001_SLVSD72.gif
Figure 5. UVLO Voltage Threshold
TPS2H000-Q1 D003_SLVSD72.gif
Figure 7. DIAG_EN Voltage Threshold
TPS2H000-Q1 D005_SLVSD72.gif
Figure 9. Body-Diode Forward Voltage
TPS2H000-Q1 D007_SLVSD72.gif
Figure 11. Channel-1 FET On-Resistance
TPS2H000-Q1 D009_SLVSD72.gif
Figure 13. Current-Sense Ratio at 1 mA
TPS2H000-Q1 D011_SLVSD72.gif
Figure 15. Current-Sense Ratio at 5 mA
TPS2H000-Q1 D013_SLVSD72.gif
Figure 17. Current-Sense Ratio at 50 mA
TPS2H000-Q1 D015_SLVSD72.gif
1.
Figure 19. Current-Sense Ratio at 200 mA
TPS2H000-Q1 D017_SLVSD72.gif
Figure 21. Current-Limit Ratio at 50 mA
TPS2H000-Q1 D019_SLVSD72.gif
Figure 23. Current-Limit Ratio at 200 mA
TPS2H000-Q1 D002_SLVSD72.gif
Figure 6. INx Voltage Threshold
TPS2H000-Q1 D004_SLVSD72.gif
A
Figure 8. SEL Voltage Threshold
TPS2H000-Q1 D006_SLVSD72.gif
Figure 10. Drain-to-Source Clamp Voltage
TPS2H000-Q1 D008_SLVSD72.gif
Figure 12. Channel-2 FET On-Resistance
TPS2H000-Q1 D010_SLVSD72.gif
Figure 14. Current-Sense Ratio at 2 mA
TPS2H000-Q1 D012_SLVSD72.gif
Figure 16. Current-Sense Ratio at 25 mA
TPS2H000-Q1 D014_SLVSD72.gif
1.
Figure 18. Current-Sense Ratio at 100 mA
TPS2H000-Q1 D016_SLVSD72.gif
1.
Figure 20. Current-Sense Ratio at 300 mA
TPS2H000-Q1 D018_SLVSD72.gif
Figure 22. Current-Limit Ratio at 100 mA
TPS2H000-Q1 D020_SLVSD72.gif
Figure 24. Current-Limit Ratio at 500 mA