JAJSBS5G February   2012  – February 2019 TPS3700

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      出力と入力のスレッショルドとヒステリシスの関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Inputs (INA+, INB–)
      2. 7.3.2 Outputs (OUTA, OUTB)
      3. 7.3.3 Window Voltage Detector
      4. 7.3.4 Immunity to Input Terminal Voltage Transients
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation (VDD > UVLO)
      2. 7.4.2 Undervoltage Lockout (V(POR) < VDD < UVLO)
      3. 7.4.3 Power-On Reset (VDD < V(POR))
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 VPULLUP to a Voltage Other Than VDD
      2. 8.1.2 Monitoring VDD
      3. 8.1.3 Monitoring a Voltage Other Than VDD
      4. 8.1.4 Monitoring Overvoltage and Undervoltage for Separate Rails
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Resistor Divider Selection
        2. 8.2.2.2 Pullup Resistor Selection
        3. 8.2.2.3 Input Supply Capacitor
        4. 8.2.2.4 Input Capacitors
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 評価基板
      2. 11.1.2 デバイスの項目表記
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DSE|6
  • DDC|6
サーマルパッド・メカニカル・データ
発注情報

6.8 Typical Characteristics

at TJ = 25°C and VDD = 5 V (unless otherwise noted)
TPS3700 D002_SLVSCI7.gif
Figure 2. Supply Current (IDD) vs Supply Voltage (VDD)
TPS3700 D004_SLVSCI7.gif
Figure 4. Hysteresis (Vhys) vs Temperature
TPS3700 D006_SLVSCI7.gif
Figure 6. Propagation Delay vs Temperature
(Low-to-High Transition at the Inputs)
TPS3700 D008_SLVSCI7.gif
Figure 8. Supply Current (IDD) vs
Output Sink Current
TPS3700 D010_SLVSCI7.gif
Figure 10. Output Voltage Low (VOL) vs
Output Sink Current (0°C)
TPS3700 D012_SLVSCI7.gif
Figure 12. Output Voltage Low (VOL) vs
Output Sink Current (85°C)
TPS3700 D003_SLVSCI7.gif
Figure 3. Rising Input Threshold Voltage (VIT+) vs Temperature
TPS3700 D005_SLVSCI7.gif
Figure 5. Propagation Delay vs Temperature
(High-to-Low Transition at the Inputs)
TPS3700 D007_SLVSCI7.gif
INA+ = negative spike below VIT–
INB– = positive spike above VIT+
Figure 7. Minimum Pulse Duration vs
Threshold Overdrive Voltage
TPS3700 D009_SLVSCI7.gif
Figure 9. Output Voltage Low (VOL) vs
Output Sink Current (–40°C)
TPS3700 D011_SLVSCI7.gif
Figure 11. Output Voltage Low (VOL) vs
Output Sink Current (25°C)
TPS3700 D013_SLVSCI7.gif
Figure 13. Output Voltage Low (VOL) vs
Output Sink Current (125°C)