JAJSGG5D
November 2018 – March 2021
TPS3703-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Timing Diagrams
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
VDD
8.3.2
SENSE
8.3.3
RESET
8.3.4
Capacitor Time (CT)
8.3.5
Manual Reset ( MR)
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > VDD(MIN))
8.4.2
Undervoltage Lockout (VPOR < VDD < UVLO)
8.4.3
Power-On Reset (VDD < VPOR)
9
Application and Implementation
9.1
Application Information
9.1.1
Voltage Threshold Accuracy
9.1.2
CT Reset Time Delay
9.1.2.1
Factory-Programmed Reset Delay Timing
9.1.2.2
Programmable Reset Delay-Timing
9.1.3
RESET Latch Mode
9.1.4
Adjustable Voltage Thresholds
9.1.5
Immunity to SENSE Pin Voltage Transients
9.1.5.1
Hysteresis
9.2
Typical Applications
9.2.1
Design 1: Multi-Rail Window Monitoring for Microcontroller Power Rails
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
Design 2: RESET Latch Mode
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power Supply Guidelines
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Device Nomenclature
12.2
Documentation Support
12.2.1
Evaluation Module
12.3
Receiving Notification of Documentation Updates
12.4
サポート・リソース
12.5
Trademarks
12.6
静電気放電に関する注意事項
12.7
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DSE|6
MPDS287A
サーマルパッド・メカニカル・データ
発注情報
jajsgg5d_oa
jajsgg5d_pm
8
Detailed Description