JAJSH97A April   2019  – September 2019 TPS3840-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage (VDD)
        1. 9.3.1.1 VDD Hysteresis
        2. 9.3.1.2 VDD Transient Immunity
      2. 9.3.2 User-Programmable Reset Time Delay
      3. 9.3.3 Manual Reset (MR) Input
      4. 9.3.4 Output Logic
        1. 9.3.4.1 RESET Output, Active-Low
        2. 9.3.4.2 RESET Output, Active-High
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Operation (VDD > VDD(min))
      2. 9.4.2 VDD Between VPOR and VDD(min)
      3. 9.4.3 Below Power-On-Reset (VDD < VPOR)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Dual Rail Monitoring with Power-Up Sequencing
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Design 2: Automotive Off-Battery Monitoring
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves: TPS3840EVM
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイスの項目表記
    2. 13.2 コミュニティ・リソース
    3. 13.3 商標
    4. 13.4 静電気放電に関する注意事項
    5. 13.5 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

User-Programmable Reset Time Delay

The reset time delay can be set to a minimum value of 50 µs by leaving the CT pin floating, or a maximum value of approximately 6.2 seconds by connecting 10 µF delay capacitor. The reset time delay (tD) can be programmed by connecting a capacitor no larger than 10 µF between CT pin and GND.

The relationship between external capacitor (CCT_EXT) in F at CT pin and the time delay (tD) in seconds is given by Equation 2.

Equation 2. tD = -ln (0.29) x RCT x CCT_EXT + tD (no cap)

Equation 2 is simplified to Equation 3 by plugging RCT and tD(no cap) given in Electrical Characteristics section:

Equation 3. tD = 618937 x CCT_EXT + 50 µs

Equation 4 solves for external capacitor value (CCT_EXT) in units of F where tD is in units of seconds

Equation 4. CCT_EXT = (tD- 50 µs) ÷ 618937

The reset delay varies according to three variables: the external capacitor variance (CCT), CT pin internal resistance (RCT) provided in the Electrical Characteristics table, and a constant. The minimum and maximum variance due to the constant is shown in Equation 5 and Equation 6.

Equation 5. s tD (minimum) = -ln (0.36) x RCT (min) x CCT (min) + tD (no cap, min)
Equation 6. tD (maximum) = -ln (0.26) x RCT (max) x CCT (max) + tD (no cap, max)

The recommended maximum delay capacitor for the TPS3840 is limited to 10 µF as this ensures there is enough time for the capacitor to fully discharge when the reset condition occurs. When a voltage fault occurs, the previously charged up capacitor discharges, and if the monitored voltage returns from the fault condition before the delay capacitor discharges completely, the delay capacitor will begin charging from a voltage above zero and the reset delay will be shorter than expected. Larger delay capacitors can be used so long as the capacitor has enough time to fully discharge during the duration of the voltage fault.