JAJSU21 April   2024 TPS3842

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specification
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagram
  8. 7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 SENSE Input
        1. 8.3.1.1 SENSE Hysteresis
      2. 8.3.2 Selecting the SENSE Delay Time
      3. 8.3.3 Selecting the RESET Delay Time
      4. 8.3.4 RESET Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation (VDD > VDD(min))
      2. 8.4.2 Above Power-On Reset but Less Than VDD(min) (VPOR < VDD < VDD(min))
      3. 8.4.3 Below Power-On Reset (VDD < VPOR)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Meeting the Sense and Reset Delay
      3. 9.2.3 Application Curve
      4. 9.2.4 Power Supply Recommendations
      5. 9.2.5 Layout
        1. 9.2.5.1 Layout Guidelines
        2. 9.2.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 Trademarks
    3. 10.3 静電気放電に関する注意事項
    4. 10.4 サポート・リソース
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.2 Selecting the SENSE Delay Time

TPS3842 has adjustable sense time delay with external capacitors.

  • A capacitor on CTS programs the excursion detection on SENSE.
  • No capacitor on this pin gives the fastest sense delay time indicated by tPD in Section 6.6.
  • Parasitic capacitance on the CTS pin counts as CTS capacitance and increases TCTS.

The time delay (tCTS) can be programmed by connecting a capacitor between CTS pin and GND.

The relationship between external capacitor CCTS_EXT (typ) and the time delay tCTS (typ) is given by Equation 4.

Equation 4. tCTS (typ) = 2.858 x CCTS_EXT (typ)

CCTS_EXT (typ) = is given in microfarads (μF)

The sense delay varies according to the external capacitor (CCTS_EXT). The minimum and maximum variance due to the constant is show in Equation 8 and Equation 9:

Equation 5. tCTS (max) = 3.715 x CCTS_EXT (max)
Equation 6. tCTS (min) = 2 x CCTS_EXT (min)

There is no limit to the capacitor on CTS pin. Make sure there is enough time for the capacitor to fully discharge when a voltage fault occurs to prevent the CTS capacitor from having charge before the next fault. Also, having a too large of a capacitor value can cause very slow charge up (rise times) and system noise can cause the internal circuit to trip earlier or later near the threshold.

* Leakages on the capacitor can effect accuracy of sense time delay.