JAJSLW0B
October 2022 – January 2025
TPS38700
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Device State Diagram
7.3.2
Built-In Self Test and Configuration Load
7.3.3
CLK32K
7.3.4
BACKUP State
7.3.5
FAILSAFE State
7.3.6
Transitioning Sequences
7.3.6.1
Sequence 1: Power Up
7.3.6.2
Sequence 2: Emergency Power Down
7.3.6.3
Sequence 3: Sleep Entry
7.3.6.4
Sequence 4: Sleep Exit
7.3.6.5
Sequence 5 & 6: Power Down from Active and Sleep States
7.3.6.6
Sequence 7: Sleep Exit Due to NRST_IN
7.3.6.7
Sequence 8: RESET Due to NRST_IN
7.3.6.8
Sequence 9: Failsafe Power Down
7.3.6.9
Output Sequencing
7.3.7
I2C
7.3.7.1
Packet Error Checking (PEC)
7.4
Register Map Table
7.4.1
Register Descriptions
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Automotive Multichannel Sequencer and Monitor
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.4
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power Supply Guidelines
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Nomenclature
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGE|24
MPQF124G
サーマルパッド・メカニカル・データ
RGE|24
QFND008AA
発注情報
jajslw0b_oa
jajslw0b_pm
7
Detailed Description