JAJSLW0A October   2022  – November 2022 TPS38700

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device State Diagram
      2. 8.3.2 Built-In Self Test and Configuration Load
      3. 8.3.3 CLK32K
      4. 8.3.4 BACKUP State
      5. 8.3.5 FAILSAFE State
      6. 8.3.6 Transitioning Sequences
        1. 8.3.6.1 Sequence 1: Power Up
        2. 8.3.6.2 Sequence 2: Emergency Power Down
        3. 8.3.6.3 Sequence 3: Sleep Entry
        4. 8.3.6.4 Sequence 4: Sleep Exit
        5. 8.3.6.5 Sequence 5 & 6: Power Down from Active and Sleep States
        6. 8.3.6.6 Sequence 7: Sleep Exit Due to NRST_IN
        7. 8.3.6.7 Sequence 8: RESET Due to NRST_IN
        8. 8.3.6.8 Sequence 9: Failsafe Power Down
        9. 8.3.6.9 Output Sequencing
      7. 8.3.7 I2C
    4. 8.4 Register Map Table
      1. 8.4.1 Register Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Supply Guidelines
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
      1.      Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.1 Device Nomenclature

Table 10-1 shows how to decode the function of the device based on the device ordering code, while
Table 10-2 shows the sequence configuration based on the device ordering code. See Figure 5-1 for more information regarding how to decode the device part number.

Table 10-1 Device Comparison Table
ORDERING CODE FUNCTIONS EN PINS DEFAULT ALT FUNC. PINS TIME SLOT (μsec) I2C ADDR. RESET DELAY (msec) WATCHDOG PEC(1) I2C PULL-UP VOLTAGE (V)
TPS38700C04NRGER Sequencer, NEM_PD Push-Pull Low Open-Drain 625 3C 16 Disabled Enabled 3.3
(1) For parts with PEC enabled:
  1. PEC calculation is based on initializing to 0xFF.
  2. In case of a PEC violation there needs to be a subsequent I2C transaction before NIRQ is asserted.
  3. If incorrect PEC is given it will assert NIRQ.
  4. If there is an extra byte after successfully writing the correct PEC byte, NIRQ will be asserted and the write will fail.
Table 10-2 Sequence Configuration Table
ORDERING CODEPINSSEQUENCE UPSEQUENCE DOWN
04NPWR_EN1Power Up Slot 1Power Down Slot 5
PWR_EN2Power Up Slot 1Power Down Slot 1
PWR_EN3Power Up Slot 2Power Down Slot 4
PWR_EN4Power Up Slot 2Power Down Slot 4
PWR_EN5Power Up Slot 4Power Down Slot 2
PWR_EN6Power Up Slot 6Power Down Slot 1
PWR_EN7Power Up Slot 1Power Down Slot 1
PWR_EN8Power Up Slot 2Power Down Slot 4
PWR_EN9Power Up Slot 4Power Down Slot 2
PWR_EN10Power Up Slot 0Power Down Slot 0
PWR_EN11Power Up Slot 4Power Down Slot 2
PWR_EN12Power Up Slot 0Power Down Slot 0
PWR_CLK32Power Up Slot 4Power Down Slot 4
Sequence DownSequence Up
SLP_EN1Sleep Exit Slot 0Sleep Entry Slot 0
SLP_EN2Sleep Exit Slot 1Sleep Entry Slot 3
SLP_EN3Sleep Exit Slot 3Sleep Entry Slot 2
SLP_EN4Sleep Exit Slot 0Sleep Entry Slot 0
SLP_EN5Sleep Exit Slot 0Sleep Entry Slot 0
SLP_EN6Sleep Exit Slot 2Sleep Entry Slot 1
SLP_EN7Sleep Exit Slot 1Sleep Entry Slot 3
SLP_EN8Sleep Exit Slot 3Sleep Entry Slot 2
SLP_EN9Sleep Exit Slot 4Sleep Entry Slot 1
SLP_EN10Sleep Exit Slot 0Sleep Entry Slot 0
SLP_EN11Sleep Exit Slot 1Sleep Entry Slot 1
SLP_EN12Sleep Exit Slot 0Sleep Entry Slot 0
SLP_CLK32Sleep Exit Slot 0Sleep Entry Slot 0