JAJSOH5D November   2022  – November 2023 TPS389C03-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  I2C
      2. 7.3.2  Maskable Interrupt (AMSK)
      3. 7.3.3  VDD
      4. 7.3.4  MON
      5. 7.3.5  NRST
      6. 7.3.6  NIRQ
      7. 7.3.7  ADC
      8. 7.3.8  Packet Error Checking (PEC)
      9. 7.3.9  Q&A Watchdog
        1. 7.3.9.1 Question and Token Generation
        2. 7.3.9.2 Q&A Watchdog Open and Close Window Delay
        3. 7.3.9.3 Q&A Watchdog Status Register
        4. 7.3.9.4 Q&A Watchdog Timing
        5. 7.3.9.5 Q&A Watchdog State Machine and Test Program
      10. 7.3.10 Error Signal Monitoring (ESM)
        1. 7.3.10.1 ESM Timing
    4. 7.4 Device Functional Modes
      1. 7.4.1 Built-In Self Test and Configuration Load
        1. 7.4.1.1 Notes on BIST Execution
      2. 7.4.2 TPS389C03-Q1 Power ON
  9. 8 Register Maps
    1. 8.1 Registers Overview
      1. 8.1.1 BANK0 Registers
      2. 8.1.2 BANK1 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Supply Guidelines
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Documentation Support
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.9.1 Question and Token Generation

A question is presented to the MCU as a combination of the TOKEN[3:0] and the ANSW_CNT[1:0] status bits found in the WD_STAT_WA register. ANSW_CNT[1:0] has a default value of ANSW_CNT[1:0] = 11b and is decremented when a question is answered correctly. The value of ANSW_CNT[1:0] is reset to ANSW_CNT[1:0] = 11b when a question is answered incorrectly or a good event is completed.

The watchdog uses the Token Counter (TOKEN_CNT[3:0] bits Figure 7-10) and a Linear Feedback Shift Register (LFSR) to generate the 4-bit TOKEN[3:0]. The LFSR architecture can be configured using POLY[1:0] in the WDT_QA_CFG register in BANK1 as shown in Figure 7-10. In a typical application, it is not necessary to change the value of POLY[1:0] from the default 00b. However, POLY[1:0] can be configured if a different LFSR architecture is required. The diagram illustrated in Figure 7-9 represents how questions are generated by the watchdog.

During the watchdog startup state, the LFSR is set with the initial value SEED[3:0], which is located in the WDT_QA_CFG register in BANK1. SEED[3:0] has a default value of 0000b.
GUID-20230627-SS0I-3RDR-TDV8-FSLPQGSZDTLZ-low.svg Figure 7-9 Watchdog Question Generation

At the end of a good event, the Token Counter is incremented, and the value of TOKEN[3:0] will change as a result of the mux and logic combinations shown in Figure 7-10.

GUID-20221031-SS0I-PJ7Z-9V7B-LT6BHMJSLPDF-low.svg
A. A value of 0000b is a special seed and equates to 0001b, including the default loading of 0000b during power up.
Figure 7-10 Watchdog Question and Token Generation

Once the Token Counter has reached the maximum value of 1111b, the counter will reset and provide a clock pulse to the LFSR. The clock pulse will left shift the value stored in the LFSR, which changes the value of the TOKEN[3:0]. During the special case of SEED[3:0] = 0000b, Bit 0 of the LFSR will be incremented the first time the Token Counter resets. Subsequent Token Counter resets will provide the typical clock pulse that left-shifts the LFSR. While left shifting, the value of seed will cycle through values 1 to 15 as listed in Figure 7-10.

The mux devices that generate TOKEN[3:0] are configured using FDBK[1:0] (WDT_QA_CFG register in BANK1). It is not necessary to change the value of FDBK[1:0] from the default value of 00b, and it is important to note that changing FDBK[1:0] also changes the logic equations required to calculate the reference answer. The different reference answer logic equations are listed below:

For FDBK[1:0] = 00b :

  • Reference-Answer[0] = TOKEN[0] XOR (TOKEN[3] XOR ANSW_CNT[1])
  • Reference-Answer[1] = TOKEN[0] XOR (TOKEN[1] XOR TOKEN[2]) XOR ANSW_CNT[1]
  • Reference-Answer[2] = TOKEN[0] XOR (TOKEN[3] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[3] = TOKEN[2] XOR (TOKEN[0] XOR TOKEN[3]) XOR ANSW_CNT[1]
  • Reference-Answer[4] = TOKEN[1] XOR ANSW_CNT[0]
  • Reference-Answer[5] = TOKEN[3] XOR ANSW_CNT[0]
  • Reference-Answer[6] = TOKEN[0] XOR ANSW_CNT[0]
  • Reference-Answer[7] = TOKEN[2] XOR ANSW_CNT[0]

For FDBK[1:0] = 01b :

  • Reference-Answer[0] = TOKEN[1] XOR (TOKEN[2] XOR ANSW_CNT[1])
  • Reference-Answer[1] = TOKEN[1] XOR (TOKEN[1] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[2] = TOKEN[3] XOR (TOKEN[2] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[3] = TOKEN[1] XOR (TOKEN[3] XOR TOKEN[3]) XOR ANSW_CNT[1]
  • Reference-Answer[4] = TOKEN[0] XOR ANSW_CNT[0]
  • Reference-Answer[5] = TOKEN[2] XOR ANSW_CNT[0]
  • Reference-Answer[6] = TOKEN[3] XOR ANSW_CNT[0]
  • Reference-Answer[7] = TOKEN[1] XOR ANSW_CNT[0]

For FDBK[1:0] = 10b :

  • Reference-Answer[0] = TOKEN[2] XOR (TOKEN[1] XOR ANSW_CNT[1])
  • Reference-Answer[1] = TOKEN[2] XOR (TOKEN[0] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[2] = TOKEN[1] XOR (TOKEN[1] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[3] = TOKEN[0] XOR (TOKEN[2] XOR TOKEN[3]) XOR ANSW_CNT[1]
  • Reference-Answer[4] = TOKEN[2] XOR ANSW_CNT[0]
  • Reference-Answer[5] = TOKEN[1] XOR ANSW_CNT[0]
  • Reference-Answer[6] = TOKEN[2] XOR ANSW_CNT[0]
  • Reference-Answer[7] = TOKEN[0] XOR ANSW_CNT[0]

For FDBK[1:0] = 11b

  • Reference-Answer[0] = TOKEN[3] XOR (TOKEN[0] XOR ANSW_CNT[1])
  • Reference-Answer[1] = TOKEN[3] XOR (TOKEN[3] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[2] = TOKEN[1] XOR (TOKEN[0] XOR TOKEN[1]) XOR ANSW_CNT[1]
  • Reference-Answer[3] = TOKEN[3] XOR (TOKEN[1] XOR TOKEN[3]) XOR ANSW_CNT[1]
  • Reference-Answer[4] = TOKEN[3] XOR ANSW_CNT[0]
  • Reference-Answer[5] = TOKEN[0] XOR ANSW_CNT[0]
  • Reference-Answer[6] = TOKEN[1] XOR ANSW_CNT[0]
  • Reference-Answer[7] = TOKEN[3] XOR ANSW_CNT[0]

Example code for answer calcultion when FDBK[1:0] = 00b is included in Figure 7-11.

GUID-20221028-SS0I-Q6LN-BKJR-SRWFMNZVPT5X-low.svg Figure 7-11 Watchdog Answer Calculation Code for FDBK[1:0] = 00b