JAJS234H MARCH   2007  – May 2019 TPS40192 , TPS40193

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      アプリケーション概略図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Voltage Reference
      2. 8.3.2  Oscillator
      3. 8.3.3  UVLO
      4. 8.3.4  Enable Functionality
      5. 8.3.5  Start-Up Sequence and Timing
      6. 8.3.6  Selecting the Short Circuit Current
      7. 8.3.7  5-V Regulator
      8. 8.3.8  Prebias Start-Up
      9. 8.3.9  Drivers
      10. 8.3.10 Power Good
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Conduction Mode
      2. 8.4.2 Low-Quiescent Shutdown
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Selecting the Switching Frequency
        2. 9.2.2.2  Inductor Selection
        3. 9.2.2.3  Output Capacitor Selection (C8)
        4. 9.2.2.4  Peak Current Rating of the Inductor
        5. 9.2.2.5  Input Capacitor Selection (C7)
        6. 9.2.2.6  MOSFET Switch Selection (Q1, Q2)
        7. 9.2.2.7  Boot Strap Capacitor
        8. 9.2.2.8  Input Bypass Capacitor (C6)
        9. 9.2.2.9  BP5 Bypass Capacitor (C5)
        10. 9.2.2.10 Input Voltage Filter Resistor (R11)
        11. 9.2.2.11 Short Circuit Protection (R9)
        12. 9.2.2.12 Feedback Compensation (Modeling the Power Stage)
        13. 9.2.2.13 Feedback Divider (R7, R8)
        14. 9.2.2.14 Error Amplifier Compensation (R6, R10, C1, C2, C3)
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 関連デバイス
      2. 12.1.2 デバイスの項目表記
    2. 12.2 ドキュメントのサポート
    3. 12.3 関連リンク
    4. 12.4 ドキュメントの更新通知を受け取る方法
    5. 12.5 コミュニティ・リソース
    6. 12.6 商標
    7. 12.7 静電気放電に関する注意事項
    8. 12.8 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

TJ = –40°C to 85°C, VVDD= 12 Vdc, all parameters at zero power dissipation (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
REFERENCE
VFB Feedback voltage range 0°C ≤ TJ ≤ 85°C 588 591 594 mV
-40°C ≤ TJ ≤ 85°C 585 591 594
INPUT SUPPLY
VVDD Input voltage range 4.5 18 V
IVDD Operating current VENABLE = 3 V 2.5 4 mA
VENABLE = 0.6 V 45 70 μA
ON-BOARD REGULATOR
V5VBP Output voltage VVDD > 6 V, I5VBP ≤ 10 mA 5.1 5.3 5.5 V
VDO Regulator dropout voltage VVDD - VBP5 , VVDD = 5 V, IBP5 ≤ 25 mA 350 550 mV
ISC Regulator current limit threshold 50 mA
IBP5 Average current 50
OSCILLATOR
fSW Switching frequency TPS40193 240 300 360 kHz
TPS40192 500 600 700
VRMP Ramp amplitude(1) 1 V
PWM
DMAX Maximum duty cycle(1) 85%
tON(min) Minimum controlled pulse(1) 110 ns
tDEAD Output driver dead time HDRV off to LDRV on 50
LDRV off to HDRV on 25
SOFT START
tSS Soft-start time 3 4 6 ms
tSSDLY Soft-start delay time 2
tREG Time to regulation 6
ERROR AMPLIFIER
GBWP Gain bandwidth product(1) 7 10 MHz
AOL DC gain(1) 60 dB
IIB Input bias current (current out of FB pin) 100 nA
IEAOP Output source current VFB = 0 V 1 mA
IEAOM Output sink current VFB = 2 V 1
SHORT CIRCUIT PROTECTION
tPSS(min) Minimum pulse during short circuit(1) 250 ns
tBLNK Blanking time(1) 60 90 120
tOFF Off-time between restart attempts 30 50 ms
VILIM Short circuit comparator threshold voltage RCOMP(GND) = OPEN, TJ = 25°C 160 200 240 mV
RCOMP(GND) = 4 kΩ, TJ = 25°C 80 100 120
RCOMP(GND) = 12 kΩ, TJ = 25°C 228 280 342
VILIMH Short circuit threshold voltage on high-side MOSFET TJ = 25°C 400 550 650
OUTPUT DRIVERS
RHDHI High-side driver pullup resistance VBOOT - VSW = 4.5 V, IHDRV = -100 mA 3 6 Ω
RHDLO High-side driver pull-down resistance VBOOT - VSW = 4.5 V, IHDRV = 100 mA 1.5 3
RLDHI Low-side driver pullup resistance ILDRV = -100 mA 2.5 5
RLDLO Low-side driver pull-down resistance ILDRV = 100 mA 0.8 1.5
tHRISE High-side driver rise time(1) CLOAD = 1 nF 15 35 ns
tHFALL High-side driver fall time(1) 10 25
tLRISE Low-side driver rise time(1) 15 35
tLFALL Low-side driver fall time(1) 10 25
UVLO
VUVLO Turn-on voltage 3.9 4.2 4.4 V
UVLOHYST Hysteresis 700 800 900 mV
SHUTDOWN
VIH High-level input voltage, ENABLE 1.9 3 V
VIL Low-level input votlage, ENABLE 0.6
POWER GOOD
VOV Feedback voltage limit for power good 650 mV
VUV Feedback voltage limit for power good 525
VPG_HYST Powergood hysteresis voltage at FB pin 30
RPGD Pulldown resistance of PGD pin VFB = 0 V 7 50 Ω
IPDGLK Leakage current VFB = 0 V 7 12 μA
BOOT DIODE
VDFWD Bootstrap diode forward voltage IBOOT = 5 mA 0.5 0.8 1.2 V
THERMAL SHUTDOWN
TJSD Junction shutdown temperature(1) 145 °C
TJSDH Hysteresis(1) 20
(1) Specified by design. Not production tested.