JAJSR60F August   2008  – June 2020 TPS40210-Q1 , TPS40211-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5.   5
  6. 4 Revision History
  7. 5 Pin Configuration and Functions
    1.     Pin Functions
  8. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Minimum On-Time and Off-Time Considerations
      2. 7.3.2  Current Sense and Overcurrent
      3. 7.3.3  Current Sense and Subharmonic Instability
      4. 7.3.4  Current Sense Filtering
      5. 7.3.5  Soft Start
      6. 7.3.6  BP Regulator
      7. 7.3.7  Shutdown (DIS/ EN Pin)
      8. 7.3.8  Control Loop Considerations
      9. 7.3.9  Gate Drive Circuit
      10. 7.3.10 TPS40211-Q1
    4. 7.4 Device Functional Modes
      1. 7.4.1 Setting the Oscillator Frequency
      2. 7.4.2 Synchronizing the Oscillator
  10. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Duty Cycle Estimation
        2. 8.2.2.2  Inductor Selection
        3. 8.2.2.3  Rectifier Diode Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Current Sense and Current Limit
        7. 8.2.2.7  Current Sense Filter
        8. 8.2.2.8  Switching MOSFET Selection
        9. 8.2.2.9  Feedback Divider Resistors
        10. 8.2.2.10 Error Amplifier Compensation
        11. 8.2.2.11 R-C Oscillator
        12. 8.2.2.12 Soft-Start Capacitor
        13. 8.2.2.13 Regulator Bypass
      3. 8.2.3 Application Curves
  11. 9 Power Supply Recommendations
  12. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  13. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 サード・パーティ製品に関する免責事項
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 サポート・リソース
    6. 11.6 Trademarks
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 用語集
  14. 12Mechanical, Packaging, and Orderable Information
    1.     70

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発注情報

7.3.2 Current Sense and Overcurrent

The TPS40210-Q1 and TPS40211-Q1 devices are current-mode controllers and use a resistor in series with the source terminal power FET to sense current for both the current-mode control and overcurrent protection. The device enters a current-limit state if the voltage on the ISNS pin exceeds the current-limit threshold voltage VISNS(oc) from the Section 6.5. When this happens, the controller discharges the SS capacitor through a relatively high impedance and then attempts to restart. The amount of output current that causes this to happen is dependent on several variables in the converter.

GUID-5A198D91-6F5A-4285-8A7D-36C20EC010CB-low.gifFigure 7-1 Oscillator Components
GUID-4DE2FBBE-9262-4C70-9797-A9EAAABF293A-low.gifFigure 7-2 Current Sense Components

The load current overcurrent threshold is set by proper choice of RISNS. If the converter is operating in discontinuous mode, the current sense resistor is found in Equation 5.

Equation 5. GUID-9D63B625-648D-4E4D-B247-91275A04565B-low.gif

If the converter is operating in continuous conduction mode, RISNS can be found in Equation 6.

Equation 6. GUID-FCAA1814-EA39-4AC8-9163-CB5F4675E8D9-low.gif

where

  • RISNS is the value of the current sense resistor in Ω.
  • VISNS(oc) is the overcurrent threshold voltage at the ISNS pin (from the Section 6.5)
  • D is the duty cycle (from Equation 2)
  • fSW is the switching frequency in Hz
  • VIN is the input voltage to the power stage in V (see text)
  • L is the value of the inductor in H
  • IOUT(oc) is the desired overcurrent trip point in A
  • VD is the drop across the diode in Figure 7-2

The TPS40210-Q1 and TPS40211-Q1 devices have a fixed undervoltage lockout (UVLO) that allows the controller to start at a typical input voltage of 4.25 V. If the input voltage is slowly rising, the converter might have less than its designed nominal input voltage available when it has reached regulation. As a result, this can decrease the apparent current-limit load current value and must be taken into consideration when selecting RISNS. The value of VIN used to calculate RISNS must be the value at which the converter finishes start-up. The total converter output current at start-up is the sum of the external load current and the current required to charge the output capacitor(s). See the Section 7.3.5 section of this data sheet for information on calculating the required output capacitor charging current.

The topology of the standard boost converter has no method to limit current from the input to the output in the event of a short circuit fault on the output of the converter. If protection from this type of event is desired, it is necessary to use some secondary protection scheme such as a fuse or rely on the current limit of the upstream power source.