The TPS43060 and TPS43061 are low IQ current-mode synchronous boost controllers with wide-input voltage range from 4.5 to 38 V (40 V absolute max) and boosted output range up to 58 V. Synchronous rectification enables high-efficiency for high-current applications, and lossless inductor DCR sensing further improves efficiency. The resulting low-power losses combined with a 3-mm × 3-mm WQFN-16 package with PowerPAD™ supports high power-density and high-reliability boost converter solutions over extended (–40°C to 150°C) temperature range.
The TPS43060 includes a 7.5-V gate drive supply, which is suitable to drive a broad range of MOSFETs. The TPS43061 has a 5.5-V gate drive supply and driver strength optimized for low Qg NexFET power MOSFETs. Also, TPS43061 provides an integrated bootstrap diode for the high-side gate driver to reduce the external parts count.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
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TPS43060 | RTE (16) | 3.00 mm × 3.00 mm |
TPS43061 |
Changes from C Revision (September 2013) to D Revision
Changes from B Revision (August 2013) to C Revision
Changes from A Revision (December 2012) to B Revision
Changes from * Revision (December 2012) to A Revision
PIN | DESCRIPTION | |
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NAME | NO. | |
RT/CLK | 1 | Resistor timing and external clock. An external resistor from this pin to the AGND pin programs the switching frequency between 50 kHz and 1 MHz. Driving the pin with an external clock between 300 kHz to 1 MHz synchronizes the switching frequency to the external clock. |
SS | 2 | Soft-start programming pin. A capacitor between the SS pin and AGND pin sets soft-start time. |
COMP | 3 | Output of the internal transconductance error amplifier. The feedback loop compensation network is connected from this pin to AGND. |
FB | 4 | Error amplifier input and feedback pin for voltage regulation. Connect this pin to the center tap of a resistor divider to set the output voltage. |
ISNS– | 5 | Inductor current sense comparator inverting input pin. This pin is normally connected to the inductor side of the current sense resistor. |
ISNS+ | 6 | Inductor current sense comparator non-inverting input pin. This pin is normally connected to the VIN side of the current sense resistor. |
VIN | 7 | The input supply pin to the IC. Connect VIN to a supply voltage between 4.5 and 38 V. It is acceptable for the voltage on the VIN pin to be different from the boost power stage input, ISNS+, and ISNS– pins. |
LDRV | 8 | Low-side gate driver output. Connect this pin to the gate of the low-side N-channel MOSFET. When VIN bias is removed, an internal 200-kΩ resistor pulls LDRV to PGND. |
PGND | 9 | Power ground of the IC. Connect this pin to the source of the low-side MOSFET. PGND should be connected to AGND via a single point on the PCB. |
VCC | 10 | Output of an internal LDO and power supply for internal control circuits and gate drivers. VCC is typically 7.5 V for the TPS43060 and 5.5 V for the TPS43061. Connect a low-ESR ceramic capacitor from this pin to PGND. TI recommends a capacitance range from 0.47 to 10 µF. |
BOOT | 11 | Bootstrap capacitor node for high-side MOSFET gate driver. Connect the bootstrap capacitor from this pin to the SW pin. For the TPS43060, also connect a bootstrap diode from VCC to BOOT. |
SW | 12 | Switching node of the boost converter. Connect this pin to the junction of the drain of the low-side MOSFET, the source of high-side synchronous MOSFET, and the inductor. |
HDRV | 13 | High-side gate driver output. Connect this pin to the gate of the high-side synchronous rectifier MOSFET. When VIN bias is removed, this pin is connected to SW through an internal 200-kΩ resistor. |
PGOOD | 14 | Power good indicator. This pin is an open-drain output. TI recommends a 10-kΩ pullup resistor between PGOOD and VCC or an external logic supply pin. |
EN | 15 | Enable pin with internal pullup current source. Floating this pin will enable the IC. Pull below 1.2 V to enter low current standby mode. Pull below 0.4 V to enter shutdown mode. The EN pin can be used to implement adjustable UVLO using two resistors. |
AGND | 16 | Analog signal ground of the IC. AGND should be connected to PGND at a single point on the PCB. |
PowerPAD | 17 | The PowerPAD should be connected to AGND. If possible, use thermal vias to connect to an internal ground plane for improved power dissipation. |