JAJS455B December   2009  – July 2017 TPS43331-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  DC Electrical Characteristics
    6. 6.6  I2C Interface Electrical Characteristics
    7. 6.7  Switching Regulators Electrical Characteristics
    8. 6.8  Standby Regulator (VSTBY) Electrical Characteristics
    9. 6.9  Linear Regulator (VLR) Electrical Characteristics
    10. 6.10 High-Side Driver (HSD) Electrical Characteristics
    11. 6.11 AC Switching Characteristics
    12. 6.12 I2C Interface Switching Characteristics
    13. 6.13 Switching Regulators Switching Characteristics
    14. 6.14 Linear Regulator Switching Characteristics
    15. 6.15 High-Side Driver (HSD) Switching Characteristics
    16. 6.16 Timing and Switching Diagrams
    17. 6.17 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Unregulated Battery Input Voltage (VBAT)
      2. 7.3.2  Protected Unregulated Battery Input Voltage (VBATP)
      3. 7.3.3  Low-Voltage Warning Input (LVWIN)
      4. 7.3.4  Voltage Warning Output (VBATW)
      5. 7.3.5  Low-Voltage Reset (RST)
      6. 7.3.6  Power-Good Delay Timer Input (PGDLY)
      7. 7.3.7  Active Mode Enable Input (EN)
      8. 7.3.8  Slew Rate Control Capacitor Input (CSLEW)
      9. 7.3.9  Charge Pump Capacitor Input (VCP)
      10. 7.3.10 Power Ground (PGND)
      11. 7.3.11 Analog Ground Reference (AGND)
      12. 7.3.12 Inter-IC Communications Interface (I2CID)
      13. 7.3.13 Clock Input (SCL)
      14. 7.3.14 Data Line (SDA)
      15. 7.3.15 Interface Chip Identifier (I2CID)
      16. 7.3.16 Switch Mode Regulators
      17. 7.3.17 Upper FET Gate Drive Outputs (VGT1 and VGT2)
      18. 7.3.18 Lower FET Gate Driver Outputs (VGB1 and VGB2)
      19. 7.3.19 Bootstrap Capacitor Input (CBS1 and CBS2)
      20. 7.3.20 Phase Reference for High-Side Bootstrap Supply (PH1 and PH2)
      21. 7.3.21 Current Sense High-Side (ISHI1 and ISHI2)
      22. 7.3.22 Current Sense Low-Side (ISLO1 and ISLO2)
      23. 7.3.23 Regulated Output Sense Voltage Feedback (VFB1 and VFB2)
      24. 7.3.24 Feedback Compensation Input (VCMP1 and VCMP2)
      25. 7.3.25 Synchronization Input (SYNCH)
      26. 7.3.26 Standby Linear Regulator Input (VINSB)
      27. 7.3.27 Standby Regulator Output (VSTBY)
      28. 7.3.28 Standby Regulator Sense Voltage (VSTBYS)
      29. 7.3.29 Switched Linear Regulator Input (VINLR)
      30. 7.3.30 Switched Linear Regulator Output (VLR)
      31. 7.3.31 Switched Linear Regulator Sense Voltage (VLRS)
      32. 7.3.32 High-Side Driver Output (HSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Mode Definition
    5. 7.5 Programming
      1. 7.5.1 Register Definition for I2C
        1. 7.5.1.1 Chip Address Byte
    6. 7.6 Register Map
      1. 7.6.1 Data Register
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Type II Compensation
        2. 8.2.2.2 Type III Compensation
        3. 8.2.2.3 Component Calculations
          1. 8.2.2.3.1 Buck-Controllers (VBUCK1, VBUCK2)
        4. 8.2.2.4 Power Dissipation
        5. 8.2.2.5 Buck Regulators
          1. 8.2.2.5.1 Buck Regulator 1 (VBUCK 1)
            1. 8.2.2.5.1.1 Step 1. Calculate the Inductor Value
            2. 8.2.2.5.1.2 Step 2. Inductor Peak Current
            3. 8.2.2.5.1.3 Step 3. Calculating the Output Capacitance (CO)
            4. 8.2.2.5.1.4 Step 4. Calculating Loop Compensation Values
          2. 8.2.2.5.2 Buck Regulator 2 (VBUCK 2)
            1. 8.2.2.5.2.1 Step 5. Calculate the Inductor Value
            2. 8.2.2.5.2.2 Step 6. Inductor Peak Current
            3. 8.2.2.5.2.3 Step 7. Calculating the Output Capacitance (CO)
            4. 8.2.2.5.2.4 Step 8. Calculating Loop Compensation Values
      3. 8.2.3 Application Curves
    3. 8.3 System Example
      1. 8.3.1 Multiple Power Supply Configuration for Vehicle Audio Applications
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Grounding and Circuit Layout Considerations
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation Derating
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DAP Package
28-Pin HTSSOP With PowerPAD
Top View
TPS43331-Q1 pinout_dap38_lvsa38.gif

Pin Functions

PIN I/O DEFAULT STATE DESCRIPTION
NO. NAME
1 AGND Ground — Analog ground reference
2 VSTBYS I — Voltage feedback for standby regulator
3 VSTBY O — Regulated output, for standby and normal mode
4 VINSB Power — Power input for standby regulator
5 CSLEW O Low Capacitor to control VSTBY slew rate
6 VCP I — Storage capacitor for charge pump
7 VLRS I — Voltage feedback for switched linear regulator
8 VINLR Power — Input power for switched linear regulator
9 VLR O — Linear regulator output, switched using serial interface
10 EN I Low Input command for active mode
11 SDA I/O — Serial bidirectional data line for I2C
12 SCL I — Serial clock input for synchronization of data communications for I2C
13 SYNCH I Low External clock input for synchronization of switching frequency for SMPS
14 LVWIN I — Low-voltage warning input
15 VBATW O Open Battery voltage warning output
16 VBAT Power — Input power for high side driver switch
17 HSD O — High side driver output
18 PGDLY I — Power good delay capacitor input for VSTBY regulator
19 RST O Low Low-voltage reset indicator for VSTBY (active low)
20 I2CID I Low Chip Identifier for I2C
21 VBATP Power — Battery voltage input for IC with external protection for reverse connections
22 VGB2 O Low Low side gate drive output for channel 2 (synchronous switch)
23 PH2 I — Phase reference for bootstrap drive channel 2
24 VGT2 O Low High side gate drive output for channel 2 (synchronous switch)
25 CBS2 I — Bootstrap capacitor for high side gate drive channel 2
26 VCMP2 I — Compensation feedback for channel 2
27 VFB2 I — Regulated output voltage feedback for channel 2
28 ISLO2 I — Low side of output current sense, channel 2
29 ISHI2 I — High side of output current sense, channel 2
30 PGND Ground — Power ground, switching regulator ground reference
31 ISHI1 I — High side of output current sense, channel 1
32 ISLO1 I — Low side of output current sense, channel 1
33 VFB1 I — Regulated output voltage feedback for channel 1
34 VCMP1 I — Compensation feedback for channel 1
35 CBS1 I — Bootstrap capacitor for high side gate drive channel 1
36 VGT1 O Low High side gate drive output for channel 1 (synchronous switch)
37 PH1 I — Phase reference for bootstrap drive channel 1
38 VGB1 O Low Low side gate drive output for channel 1 (synchronous switch)