JAJSK58D
January 2022 – April 2024
TPS4811-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Charge Pump and Gate Driver output (VS, PU, PD, BST, SRC)
8.3.2
Capacitive Load Driving
8.3.2.1
FET Gate Slew Rate Control
8.3.2.2
Using Precharge FET - (with TPS48111-Q1 Only)
8.3.3
Short-Circuit Protection
8.3.3.1
Overcurrent Protection With Auto-Retry
8.3.3.2
Overcurrent Protection With Latch-Off
8.3.4
Short-Circuit Protection
8.3.5
Analog Current Monitor Output (IMON)
8.3.6
Overvoltage (OV) and Undervoltage Protection (UVLO)
8.3.7
Device Functional Mode (Shutdown Mode)
8.3.8
Remote Temperature sensing and Protection (DIODE)
8.3.9
Output Reverse Polarity Protection
8.3.10
TPS4811x-Q1 as a Simple Gate Driver
9
Application and Implementation
9.1
Application Information
9.2
Typical Application: Driving HVAC PTC Heater Load on KL40 Line in Power Distribution Unit
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Typical Application: Driving B2B FETs With Pre-charging the Output Capacitance
9.3.1
Design Requirements
9.3.2
External Component Selection
9.3.3
Application Curves
9.4
Power Supply Recommendations
9.5
Layout
9.5.1
Layout Guidelines
9.5.2
Layout Example
10
Device and Documentation Support
10.1
ドキュメントの更新通知を受け取る方法
10.2
サポート・リソース
10.3
Trademarks
10.4
静電気放電に関する注意事項
10.5
用語集
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGX|19
MPSS147
サーマルパッド・メカニカル・データ
発注情報
jajsk58d_oa
jajsk58d_pm
8.2
Functional Block Diagram
Figure 8-1
TPS48110-Q1 Functional Block Diagram
Figure 8-2
TPS48111-Q1 Functional Block Diagram