SLUSFM1 December 2024 TPS4812-Q1
PRODUCTION DATA
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In the applications where low power bypass path is not used, the cap charging can be done using main FET GATE drive control.
For limiting inrush current during turn-ON of the main FET with capacitive loads, use R1, R2, C1, and D2 as shown in Figure 8-7. The R1 and C1 components slow down the voltage ramp rate at the gate of main FET. The FET source follows the gate voltage resulting in a controlled voltage ramp across the output capacitors.
Use the Equation 6 to calculate the inrush current during turn-ON of the FET.
Where,
CLOAD is the load capacitance.
VBATT is the input voltage and Tcharge is the charge time.
V(BST-SRC) is the charge pump voltage (12V).
Use a damping resistor R2 (~10Ω) in series with C1. Equation 8 can be used to compute required C1 value for a target inrush current. A 100kΩ resistor for R1 can be a good starting point for calculations.
D2 ensures fast turn OFF of GATE drive by bypassing R1.
C1 results in an additional loading on CBST to charge during turn-ON. Use Equation 8 to calculate the required CBST value:
Where,
Qg(total) is the total gate charge of the FET.
ΔVBST (1V typical) is the ripple voltage across BST to SRC pins.