The sense resistor (R_SNS) must be placed close to the TPS4812-Q1 and then connect R_SNS using the Kelvin techniques. Refer to Choosing the Right Sense Resistor Layout for more information on the Kelvin techniques.

For all the applications, TI recommends a 0.1 µF or higher value ceramic decoupling capacitor between VS terminal and GND. Consider adding RC network at the supply pin (VS) of the controller to improve decoupling against the power line disturbances.

The high current path from the board’s input to the load, and the return path, must be parallel and close to each other to minimize loop inductance.

The external MOSFETs must be placed close to the controller such that the GATE of the MOSFETs are close to GATE pin to form short GATE loop. Consider adding a place holder for a resistor in series with the Gate of each external MOSFET to damp high frequency oscillations if need arises.

Place a TVS diode at the input to clamp the voltage transients during hot-plug and fast turn-off events.

The external boot-strap capacitor must be placed close to BST and SRC pins to form very short loop.

The ground connections for the various components around the TPS4812-Q1 must be connected directly to each other, and to the TPS4812-Q1’s GND, and then connected to the system ground at one point. Do not connect the various component grounds to each other through the high current ground line.