JAJSVB0 September   2024 TPS51388

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  PWM Operation and D-CAP3™ Control Mode
      2. 6.3.2  VCC Switchover Function
      3. 6.3.3  Soft Start
      4. 6.3.4  Large Duty Operation
      5. 6.3.5  Power Good
      6. 6.3.6  Overcurrent Protection and Undervoltage Protection
      7. 6.3.7  Overvoltage Protection
      8. 6.3.8  UVLO Protection
      9. 6.3.9  Output Voltage Discharge
      10. 6.3.10 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Light Load Operation
      2. 6.4.2 Advanced Eco-mode Control
      3. 6.4.3 Out-of-Audio™ Mode
      4. 6.4.4 Mode Selection
      5. 6.4.5 Standby Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 External Component Selection
          1. 7.2.2.2.1 VOUT and FB Pin Configuration
          2. 7.2.2.2.2 MODE Selection
          3. 7.2.2.2.3 Inductor Selection
          4. 7.2.2.2.4 Output Capacitor Selection
          5. 7.2.2.2.5 Input Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • VAB|13
サーマルパッド・メカニカル・データ
発注情報

6.3.6 Overcurrent Protection and Undervoltage Protection

The TPS51388 has overcurrent protection and undervoltage protection. The output overcurrent protection (OCP) is implemented using a cycle-by-cycle low-side MOSFET valley current detection and high-side MOSFET peak current detection. The switching current is monitored by measuring the MOSFET drain to source voltage. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated.

During the on-time of the high-side FET switch, the switch current increases at a linear rate determined by Vin, Vout, the on-time, and the output inductor value. During the on-time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current IOUT. If the monitored current is above the OCL level, the converter maintains low-side FET on and delays the creation of a new pulse, even the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner.

There are some important considerations for this type of overcurrent protection. When the load current is higher than the IOCL(VALLEY) added by one half of the peak-to-peak inductor ripple current, or higher than IOCL(PEAK) subtracted by one half of the peak-to-peak inductor ripple current, the OCP is triggered and the output current is being limited, the output voltage tends to drop because the load demand is higher than what the converter can support. When the output voltage falls below 60% of the target voltage, the UVP comparator detects the fall, and the device is shut off after a wait time of 200μs. This protection is a latched function. The fault latching can be reset by EN going low or VCC power cycling.

The TPS51388 also implements negative overcurrent protection, which can prevent inductor current runaway when IC works in OOA mode. When the inductor valley current hits the negative overcurrent threshold (INOCL = –5.5A typical), the low-side FET turns off, then high-side FET turns on.