JAJSC06C SEPTEMBER   2013  – June 2018 TPS53513

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  5-V LDO and VREG Start-Up
      2. 7.3.2  Enable, Soft Start, and Mode Selection
      3. 7.3.3  Frequency Selection
      4. 7.3.4  D-CAP3 Control and Mode Selection
        1. 7.3.4.1 D-CAP3 Mode
        2. 7.3.4.2 Sample and Hold Circuitry
        3. 7.3.4.3 Adaptive Zero-Crossing
      5. 7.3.5  Power-Good
      6. 7.3.6  Current Sense and Overcurrent Protection
      7. 7.3.7  Overvoltage and Undervoltage Protection
      8. 7.3.8  Out-Of-Bounds Operation
      9. 7.3.9  UVLO Protection
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip Eco-mode Light Load Operation
      2. 7.4.2 Forced Continuous-Conduction Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choose the Switching Frequency
        2. 8.2.2.2 Choose the Operation Mode
        3. 8.2.2.3 Choose the Inductor
        4. 8.2.2.4 Choose the Output Capacitor
        5. 8.2.2.5 Determine the Value of R1 and R2
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Performance
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.4.2 Sample and Hold Circuitry

TPS53513 sample_hold_slusas9.gifFigure 36. Sample and Hold Logic Circuitry (Patent Pending)

The sample and hold circuitry is the difference between D-CAP3 and D-CAP2. The sample and hold circuitry, which is an advance control scheme to boost output voltage accuracy higher on the device, is one of features of the device. The sample and hold circuitry generates a new DC voltage of CSN instead of the voltage which is produced by RC2 and CC2 which allows for tight output-voltage accuracy and makes the device more competitive.

TPS53513 ccm_with_sh_slusbn5.gifFigure 37. Continuous Conduction Mode (CCM) With Sample and Hold Circuitry
TPS53513 ccm_wo_sh_slusbn5.gifFigure 39. Continuous Conduction Mode (CCM) Without Sample and Hold Circuitry
TPS53513 C013_SLUSBN5.pngFigure 41. Output Voltage vs Output Current
TPS53513 dcm_with_sh_slusbn5.gifFigure 38. Discontinuous Conduction Mode (DCM) With Sample and Hold Circuitry
TPS53513 dcm_wo_sh_slusbn5.gifFigure 40. Discontinuous Conduction Mode (DCM) Without Sample and Hold Circuitry
TPS53513 C014_SLUSBN5.pngFigure 42. Output Voltage vs Output Current