TPS54062デバイスは60V、50mAの同期整流降圧型コンバータで、ハイサイドおよびローサイドのMOSFETが内蔵されています。電流モード制御により、外部補償が単純化され、柔軟な部品選択が可能になります。非スイッチング時の消費電流は89µAです。イネーブル・ピンにより、シャットダウン時の消費電流を1.7µAまで低減できます。
低電圧誤動作防止は内部で 4.5Vに設定されていますが、正確なイネーブル・ピンのスレッショルドを使用して、さらに高い電圧に設定できます。出力電圧のスタートアップ・ランプは、内部のスロースタート時間により制御されます。
スイッチング周波数の範囲を調整可能なため、効率と外付け部品のサイズを最適化できます。周波数のフォールドバックとサーマル・シャットダウンにより、過負荷状態時にデバイスが保護されます。
型番 | パッケージ | 本体サイズ(公称) |
---|---|---|
TPS54062 | MSOP (8) | 3.00mm×3.00mm |
VSON (8) |
Changes from C Revision (December 2014) to D Revision
Changes from B Revision (August 2012) to C Revision
Changes from A Revision (October 2011) to B Revision
Changes from * Revision (May 2011) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NUMBER | ||
BOOT | 1 | O | A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the minimum required by the output device, the output is forced to switch off until the capacitor is refreshed. |
VIN | 2 | I | Input supply voltage, 4.7 V to 60 V. |
EN | 3 | I | Enable pin, internal pull-up current source. Pull below 1.14 V to disable. Float to enable. Adjust the input undervoltage lockout with two resistors, see the Enable and Adjusting Undervoltage Lockout section. |
RT/CLK | 4 | I | Resistor Timing and External Clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the mode returns to a resistor frequency programming. |
VSENSE | 5 | I | Inverting input of the transconductance (gm) error amplifier. |
COMP | 6 | O | Error amplifier output, and input to the output switch current comparator. Connect frequency compensation components to this pin. |
GND | 7 | – | Ground |
PH | 8 | O | The source of the internal high-side power MOSFET and drain of the internal low side MOSFET |
Thermal Pad | 9 | – | GND pin must be electrically connected to the exposed pad on the printed circuit board for proper operation. VSON-8 package only. |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input coltage | 4.7 | 60 | V | |
Output current | 50 | mA | ||
Switching frequency set by RT/CLK resistor | 100 | 400 | kHz | |
Switching frequency synchronized to external clock | 300 | 400 | kHz |
THERMAL METRIC(1) | TPS54062 | UNIT | ||
---|---|---|---|---|
MSOP | VSON | |||
8 PINS | 8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 127.1 | 40.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 33.4 | 49.7 | |
RθJB | Junction-to-board thermal resistance | 80 | 15.7 | |
ψJT | Junction-to-top characterization parameter | 1 | 0.6 | |
ψJB | Junction-to-board characterization parameter | 79 | 15.9 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 4.1 |