JAJS538D May   2011  – July 2016 TPS54062

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Error Amplifier
      4. 7.3.4  Voltage Reference
      5. 7.3.5  Adjusting the Output Voltage
      6. 7.3.6  Enable and Adjusting Undervoltage Lockout
      7. 7.3.7  Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      8. 7.3.8  Selecting the Switching Frequency
      9. 7.3.9  How to Interface to RT/CLK Pin
      10. 7.3.10 Overvoltage Transient Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Near Minimum Input Voltage
      2. 7.4.2 Operation With Enable Control
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Continuous Conduction Mode (CCM) Switching Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Selecting the Switching Frequency
          2. 8.2.1.2.2 Output Inductor Selection (LO)
          3. 8.2.1.2.3 Output Capacitor
          4. 8.2.1.2.4 Input capacitor
          5. 8.2.1.2.5 Bootstrap Capacitor Selection
          6. 8.2.1.2.6 Under Voltage Lock Out Set Point
          7. 8.2.1.2.7 Output Voltage and Feedback Resistors Selection
          8. 8.2.1.2.8 Closing the Loop
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DCM Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Closing the Feedback Loop
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Voltage VIN –0.3 62 V
EN –0.3 8 V
BOOT-PH –0.3 8 V
VSENSE –0.3 6 V
COMP –0.3 3 V
PH –0.6 62 V
PH, 10ns Transient –2 62 V
RT/CLK –0.3 6 V
Current VIN Internally Limited A
EN 100 µA
BOOT 100 mA
VSENSE 10 µA
COMP 100 µA
PH Internally Limited A
RT/CLK 200 µA
Operating junction temperature –40 125 ºC
Storage temperature, Tsg –65 150 °C
(1) The Absolute Maximum Ratings specified in this section will apply to all specifications of this document unless otherwise noted. These specifications will be interpreted as the conditions which may damage the device with a single occurrence.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Input coltage 4.7 60 V
Output current 50 mA
Switching frequency set by RT/CLK resistor 100 400 kHz
Switching frequency synchronized to external clock 300 400 kHz

6.4 Thermal Information

THERMAL METRIC(1) TPS54062 UNIT
MSOP VSON
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 127.1 40.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 33.4 49.7
RθJB Junction-to-board thermal resistance 80 15.7
ψJT Junction-to-top characterization parameter 1 0.6
ψJB Junction-to-board characterization parameter 79 15.9
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 4.1
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics(1)

TJ = –40°C to 125°C, VIN = 4.7 to 60 V (unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
Operating input voltage VIN 4.7 60 V
Shutdown supply current EN = 0 V 1.7 µA
Iq Operating – Non-switching VSENSE = 0.9 V, VIN = 12 V 89 110 µA
ENABLE AND UVLO (EN PIN)
Enable threshold Rising 1.24 1.4 V
Falling 1 1.14 V
Input current Enable threshold +50 mV –4.7 µA
Enable threshold –50 mV –1.2 µA
Hysteresis 3.5 µA
Enable to start switching time 450 µs
VIN
VIN start voltage VIN rising 4.53 V
VOLTAGE REFERENCE
Voltage reference 1mA < IOUT < Minimum Current Limit 0.784 0.8 0.816 V
HIGH-SIDE MOSFET
Switch resistance BOOT-PH = 5.7 V 1.5 2.8 Ω
LOW-SIDE MOSFET
Switch resistance VIN = 12 V 0.8 1.5 Ω
ERROR AMPLIFIER
Input Current VSENSE pin 20 nA
Error amp gm –2 µA < I(COMP) < 2 µA, V(COMP) = 1 V 102 µS
EA gm during slow-start –2 µA < I(COMP) < 2 µA, V(COMP) = 1 V, VSENSE = 0.4 V 26 µS
Error amp DC gain VSENSE = 0.8 V 1000 V/V
Min unity gain bandwidth 0.5 MHz
Error amp source/sink V(COMP) = 1 V, 100-mV Overdrive ±8 µA
Start Switching Threshold 0.57 V
COMP to Iswitch gm 0.65 A/V
CURRENT LIMIT
High-side sourcing current limit threshold VIN = 12V, BOOT-PH = 5.7 V 75 134 mA
Zero cross detect current –0.7 mA
THERMAL SHUTDOWN
Thermal shutdown 146 C
RT/CLK
Operating frequency using RT mode 100 400 kHz
Switching frequency R(RT/CLK) = 510 kΩ 192 240 288 kHz
Minimum CLK pulse width 40 ns
RT/CLK voltage R(RT/CLK) = 510 kΩ 0.53 V
RT/CLK high threshold 1.3 V
RT/CLK low threshold 0.5 V
RT/CLK falling edge to PH rising edge delay Measure at 240 kHz with RT resistor in series 100 200 ns
PLL lock in time Measure at 240 kHz 100 µs
PLL frequency range 300 400 kHz
PH
Minimum On-time Measured at 50% to 50% of VIN IOUT = 50 mA 120 ns
Dead time VIN = 12V, IOUT = 50 mA, One transition 30 ns
BOOT
BOOT-PH regulation voltage VIN = 12 V 5.7 V
BOOT-PH UVLO 2.9 V
INTERNAL SLOW-START TIME
Slow-start time fSW = 240 kHz, RT = 510 kΩ, 10% to 90% 4.1 ms
(1) The Electrical Ratings specified in this section will apply to all specifications in this document unless otherwise noted. These specifications will be interpreted as conditions that will not degrade the device’s parametric or functional specifications for the life of the product containing it.

6.6 Typical Characteristics

TPS54062 g001_lvsav1.png Figure 1. High-Side RDS(on) vs Temperature
TPS54062 g003_lvsav1.png Figure 3. VREF Voltage vs Temperature
TPS54062 g004_lvsav1.png Figure 5. Frequency vs Temperature
TPS54062 g007_lvsav1.gif Figure 7. Error Amp Transconductance vs Temperature
TPS54062 g015_lvsav1.png Figure 9. Enable Pin Hysteresis Current
vs Temperature
TPS54062 g016_lvsav1.png Figure 11. Enable Pin Pullup Current vs Input Voltage
TPS54062 g008_lvsav1.png Figure 13. Supply Current (VIN pin) vs Input Voltage
TPS54062 g010_lvsav1.png Figure 15. Supply Current (VIN pin) vs
Input Voltage (0V to VSTART) EN Pin Open
TPS54062 g017_lvsav1.png Figure 17. Current Limit vs
Input Voltage
TPS54062 g002_lvsav1.png Figure 2. Low-Side RDS(on) vs Temperature
TPS54062 g005_lvsav1.gif Figure 4. Frequency vs VSENSE Voltage
TPS54062 g006_lvsav1.png Figure 6. Frequency vs RT/CLK Resistance
TPS54062 g013_lvsav1.png Figure 8. Enable Pin Voltage vs Temperature
TPS54062 g012_lvsav1.png Figure 10. Input Voltage (UVLO) vs Temperature
TPS54062 g009_lvsav1.png Figure 12. Shutdown Supply Current (VIN) vs Input Voltage
TPS54062 g011_lvsav1.png Figure 14. Supply Current (VIN pin)
vs Input Voltage (0V to VSTART) EN Pin Low
TPS54062 ss_v_tj_lvsav1.png Figure 16. Slow-Start Time vs Temperature