JAJSGM5 December   2018 TPS54340B

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と負荷電流との関係
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency PWM Control
      2. 8.3.2  Slope Compensation Output Current
      3. 8.3.3  Pulse Skip Eco-mode
      4. 8.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 8.3.5  Error Amplifier
      6. 8.3.6  Adjusting the Output Voltage
      7. 8.3.7  Enable and Adjusting Undervoltage Lockout
      8. 8.3.8  Internal Soft Start
      9. 8.3.9  Constant Switching Frequency and Timing Resistor (RT/CLK) pin)
      10. 8.3.10 Accurate Current Limit Operation and Maximum Switching Frequency
      11. 8.3.11 Synchronization to RT/CLK pin
      12. 8.3.12 Overvoltage Protection
      13. 8.3.13 Thermal Shutdown
      14. 8.3.14 Small Signal Model for Loop Response
      15. 8.3.15 Simple Small Signal Model for Peak-Current-Mode Control
      16. 8.3.16 Small Signal Model for Frequency Compensation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with VIN ≤ 4.5 V (Minimum VIN)
      2. 8.4.2 Operation with EN Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Buck Converter
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1  Custom Design with WEBENCH® Tools
        2. 9.2.2.2  Selecting the Switching Frequency
        3. 9.2.2.3  Output Inductor Selection (LO)
        4. 9.2.2.4  Output Capacitor
        5. 9.2.2.5  Catch Diode
        6. 9.2.2.6  Input Capacitor
        7. 9.2.2.7  Bootstrap Capacitor Selection
        8. 9.2.2.8  Undervoltage Lockout Setpoint
        9. 9.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 9.2.2.10 Minimum VIN
        11. 9.2.2.11 Compensation
        12. 9.2.2.12 Discontinuous Conduction Mode and Eco-mode Boundary
        13. 9.2.2.13 Power Dissipation
      3. 9.2.3 Application Curves
    3. 9.3 Other Applications
      1. 9.3.1 Inverting Power
      2. 9.3.2 Split-Rail Power Supply
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Estimated Circuit Area
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 12.1.2 WEBENCH®ツールによるカスタム設計
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.9 Constant Switching Frequency and Timing Resistor (RT/CLK) pin)

The switching frequency of the TPS54340B is adjustable over a wide range from 100 kHz to 2500 kHz by placing a resistor between the RT/CLK pin and GND pin. The RT/CLK pin voltage is typically 0.5 V and must have a resistor to ground to set the switching frequency. To determine the timing resistance for a given switching frequency, use Equation 7 or Equation 8 or the curves in Figure 6 and Figure 7. To reduce the solution size one would typically set the switching frequency as high as possible, but tradeoffs of the conversion efficiency, maximum input voltage and minimum controllable on time should be considered. The minimum controllable on-time is typically 135 ns, which limits the maximum operating frequency in applications with high input to output step down ratios. The maximum switching frequency is also limited by the frequency foldback circuit. A more detailed discussion of the maximum switching frequency is provided in Accurate Current Limit Operation and Maximum Switching Frequency.

Equation 7. TPS54340B eq6_RT_lvsbb4.gif
Equation 8. TPS54340B eq7_fsw_lvsbb4.gif