JAJS383E September   2009  – April 2018 TPS54418

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流との関係
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency PWM Control
      2. 8.3.2  Slope Compensation and Output Current
      3. 8.3.3  Bootstrap Voltage (Boot) and Low Dropout Operation
      4. 8.3.4  Error Amplifier
      5. 8.3.5  Voltage Reference
      6. 8.3.6  Adjusting the Output Voltage
      7. 8.3.7  Enable and Adjusting Undervoltage Lockout
      8. 8.3.8  Soft-Start Pin
      9. 8.3.9  Sequencing
      10. 8.3.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      11. 8.3.11 Overcurrent Protection
      12. 8.3.12 Frequency Shift
      13. 8.3.13 Reverse Overcurrent Protection
      14. 8.3.14 Synchronize Using the RT/CLK Pin
      15. 8.3.15 Power Good (PWRGD Pin)
      16. 8.3.16 Overvoltage Transient Protection
      17. 8.3.17 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Small Signal Model for Loop Response
      2. 8.4.2 Simple Small Signal Model for Peak Current Mode Control
      3. 8.4.3 Small Signal Model for Frequency Compensation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Step One: Select the Switching Frequency
        2. 9.2.2.2  Step Two: Select the Output Inductor
        3. 9.2.2.3  Step Three: Choose the Output Capacitor
        4. 9.2.2.4  Step Four: Select the Input Capacitor
        5. 9.2.2.5  Step Five: Minimum Load DC COMP Voltage
        6. 9.2.2.6  Step Six: Choose the Soft-Start Capacitor
        7. 9.2.2.7  Step Seven: Select the Bootstrap Capacitor
        8. 9.2.2.8  Step Eight: Undervoltage Lockout Threshold
        9. 9.2.2.9  Step Nine: Select Output Voltage and Feedback Resistors
          1. 9.2.2.9.1 Output Voltage Limitations
        10. 9.2.2.10 Step 10: Select Loop Compensation Components
        11. 9.2.2.11 Power Dissipation Estimate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 WEBENCH®ツールによるカスタム設計
      2. 12.1.2 開発サポート
    2. 12.2 商標
    3. 12.3 静電気放電に関する注意事項
    4. 12.4 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.6 Adjusting the Output Voltage

The output voltage is set with a resistor divider from the output node to the VSENSE pin. It is recommended to use divider resistors with 1% tolerance or better. Start with a value of 100 kΩ for the R1 resistor and use Equation 1 to calculate R2. To improve efficiency at very light loads, consider using larger resistor values. If the values are too high, the regulator is more susceptible to noise and voltage errors from the VSENSE input current are noticeable.

Equation 1. TPS54418 eq1_r2_lvs946.gif
TPS54418 vol_div_slvs974.gifFigure 23. Voltage Divider Circuit