JAJSBF8B June 2011 – April 2018 TPS54478
PRODUCTION DATA.
The TPS54478 regulates to the lower of the SS/TR pin and the internal reference voltage. A capacitor on the SS/TR pin to ground implements a slow start time. Before the SS pin reaches the voltage threshold VSSTHR, the charge current is about 45 μA. The TPS54478 internal pull-up current source of 2.2 μA charges the external slow start capacitor after the SS pin voltage exceeds VSSTHR. Equation 4 calculates the required slow start capacitor value where Tss is the desired slow start time in ms and Css is the required capacitance in nF.
vertical spacer
If during normal operation, the VIN goes below the UVLO, EN pin pulled below 1.21 V, or a thermal shutdown event occurs, the TPS54478 stops switching. When the VIN goes above UVLO, EN is released or pulled high, or a thermal shutdown is exited, then SS/TR is discharged to below 65 mV before reinitiating a powering up sequence. The VSENSE voltage will follow the SS/TR pin voltage with a 65mV offset up to 90% of the internal voltage reference. When the SS/TR voltage is greater than 90% of the internal reference voltage the offset increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference.
Simultaneous power supply sequencing can be implemented by connecting the resistor network of R1 and R2 shown in Figure 27 to the output of the power supply that needs to be tracked or another voltage reference source. Using Equation 5 and Equation 6, the tracking resistors can be calculated. To minimize the effect of the inherent SS/TR to VSENSE offset (Vssoffset) in the slow start circuit and the offset created by the pullup current source (Iss) and tracking resistors, the Vssoffset and Iss are included as variables in the equations. As the SS/TR voltage becomes more than 85% of the nominal reference voltage the Vssoffset becomes larger as the slow start circuits gradually handoff the regulation reference to the internal voltage reference. The SS/TR pin voltage needs to be greater than 0.86 V for a complete handoff to the internal voltage reference as shown in Figure 28.
vertical spacer
vertical spacer
vertical spacer
vertical spacer
vertical spacer