SLUSC81 May   2015 TPS544B25 , TPS544C25

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Linear Regulators BP3 and BP6
      2. 8.3.2  Input Undervoltage Lockout (UVLO)
      3. 8.3.3  Turn-On and Turn-Off Delay and Sequencing
      4. 8.3.4  Voltage Reference
      5. 8.3.5  Differential Remote Sense
      6. 8.3.6  Set Output Voltage and Adapative Voltage Scaling (AVS)
        1. 8.3.6.1 Increasing the Output Voltage
        2. 8.3.6.2 Decreasing the Output Voltage
        3. 8.3.6.3 Set Default Output Voltage by VSET
      7. 8.3.7  Reset VOUT
      8. 8.3.8  Switching Frequency and Synchronization
      9. 8.3.9  Soft-Start and TON_RISE Command
      10. 8.3.10 Pre-Biased Output Start-Up
      11. 8.3.11 Soft-Stop and TOFF_FALL Command
      12. 8.3.12 Current Monitoring and Low-Side MOSFET Overcurrent Protection
      13. 8.3.13 High-Side MOSFET Short-Circuit Protection
      14. 8.3.14 Over-Temperature Protection
      15. 8.3.15 Output Overvoltage and Undervoltage Protection
      16. 8.3.16 TON_MAX Fault
      17. 8.3.17 Power Good (PGOOD) Indicator
      18. 8.3.18 Fault Protection Responses
      19. 8.3.19 Switching Node
      20. 8.3.20 PMBus General Description
      21. 8.3.21 PMBus Address
      22. 8.3.22 PMBus Connections
      23. 8.3.23 Auto ARA (Alert Response Address) Response
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Conduction Mode
      2. 8.4.2 Operation with CNTL Signal Control
      3. 8.4.3 Operation with OPERATION Control
      4. 8.4.4 Operation with CNTL and OPERATION Control
    5. 8.5 Supported PMBus Commands
    6. 8.6 Register Maps
      1. 8.6.1  OPERATION (01h)
        1. 8.6.1.1 On
        2. 8.6.1.2 Off
      2. 8.6.2  ON_OFF_CONFIG (02h)
        1. 8.6.2.1 pu
        2. 8.6.2.2 cmd
        3. 8.6.2.3 cpr
        4. 8.6.2.4 pol
        5. 8.6.2.5 cpa
      3. 8.6.3  CLEAR_FAULTS (03h)
      4. 8.6.4  WRITE_PROTECT (10h)
        1. 8.6.4.1 bit5
        2. 8.6.4.2 bit6
        3. 8.6.4.3 bit7
      5. 8.6.5  STORE_DEFAULT_ALL (11h)
      6. 8.6.6  RESTORE_DEFAULT_ALL (12h)
      7. 8.6.7  CAPABILITY (19h)
      8. 8.6.8  SMBALERT_MASK (1Bh)
      9. 8.6.9  VOUT_MODE (20h)
        1. 8.6.9.1 Mode:
        2. 8.6.9.2 Exponent
      10. 8.6.10 VOUT_COMMAND (21h)
        1. 8.6.10.1 Exponent
        2. 8.6.10.2 Mantissa
      11. 8.6.11 VOUT_MAX (24h)
        1. 8.6.11.1 Exponent
        2. 8.6.11.2 Mantissa
      12. 8.6.12 VOUT_TRANSITION_RATE (27h)
        1. 8.6.12.1 Exponent
        2. 8.6.12.2 Mantissa
      13. 8.6.13 VOUT_SCALE_LOOP (29h)
        1. 8.6.13.1 Exponent
        2. 8.6.13.2 Mantissa
      14. 8.6.14 VIN_ON (35h)
        1. 8.6.14.1 Exponent
        2. 8.6.14.2 Mantissa
      15. 8.6.15 VIN_OFF (36h)
        1. 8.6.15.1 Exponent
        2. 8.6.15.2 Mantissa
      16. 8.6.16 IOUT_CAL_OFFSET (39h)
        1. 8.6.16.1 Exponent
        2. 8.6.16.2 Mantissa
      17. 8.6.17 VOUT_OV_FAULT_LIMIT (40h)
        1. 8.6.17.1 Exponent
        2. 8.6.17.2 Mantissa
      18. 8.6.18 VOUT_OV_FAULT_RESPONSE (41h)
        1. 8.6.18.1 RSP[1]
        2. 8.6.18.2 RS[2:0]
      19. 8.6.19 VOUT_OV_WARN_LIMIT (42h)
        1. 8.6.19.1 Exponent
        2. 8.6.19.2 Mantissa
      20. 8.6.20 VOUT_UV_WARN_LIMIT (43h)
        1. 8.6.20.1 Exponent
        2. 8.6.20.2 Mantissa
      21. 8.6.21 VOUT_UV_FAULT_LIMIT (44h)
        1. 8.6.21.1 Exponent
        2. 8.6.21.2 Mantissa
      22. 8.6.22 VOUT_UV_FAULT_RESPONSE (45h)
        1. 8.6.22.1 RSP[1]
        2. 8.6.22.2 RS[2:0]
      23. 8.6.23 IOUT_OC_FAULT_LIMIT (46h)
        1. 8.6.23.1 Exponent
        2. 8.6.23.2 Mantissa
      24. 8.6.24 IOUT_OC_FAULT_RESPONSE (47h)
        1. 8.6.24.1 RSP[1]
        2. 8.6.24.2 RS[2:0]
      25. 8.6.25 IOUT_OC_WARN_LIMIT (4Ah)
        1. 8.6.25.1 Exponent
        2. 8.6.25.2 Mantissa
      26. 8.6.26 OT_FAULT_LIMIT (4Fh)
        1. 8.6.26.1 Exponent
        2. 8.6.26.2 Mantissa
      27. 8.6.27 OT_FAULT_RESPONSE (50h)
        1. 8.6.27.1 RSP[1]
        2. 8.6.27.2 RS[2:0]
      28. 8.6.28 OT_WARN_LIMIT (51h)
        1. 8.6.28.1 Exponent
        2. 8.6.28.2 Mantissa
      29. 8.6.29 TON_DELAY (60h)
        1. 8.6.29.1 Exponent
        2. 8.6.29.2 Mantissa
      30. 8.6.30 TON_RISE (61h)
        1. 8.6.30.1 Exponent
        2. 8.6.30.2 Mantissa
      31. 8.6.31 TON_MAX_FAULT_LIMIT (62h)
        1. 8.6.31.1 Exponent
        2. 8.6.31.2 Mantissa
      32. 8.6.32 TON_MAX_FAULT_RESPONSE (63h)
        1. 8.6.32.1 RSP[1]
        2. 8.6.32.2 RS[2:0]
      33. 8.6.33 TOFF_DELAY (64h)
        1. 8.6.33.1 Exponent
        2. 8.6.33.2 Mantissa
      34. 8.6.34 TOFF_FALL (65h)
        1. 8.6.34.1 Exponent
        2. 8.6.34.2 Mantissa
      35. 8.6.35 STATUS_BYTE (78h)
      36. 8.6.36 STATUS_WORD (79h)
      37. 8.6.37 STATUS_VOUT (7Ah)
      38. 8.6.38 STATUS_IOUT (7Bh)
      39. 8.6.39 STATUS_INPUT (7Ch)
      40. 8.6.40 STATUS_TEMPERATURE (7Dh)
      41. 8.6.41 STATUS_CML (7Eh)
      42. 8.6.42 STATUS_MFR_SPECIFIC (80h)
      43. 8.6.43 READ_VOUT (8Bh)
        1. 8.6.43.1 Exponent
        2. 8.6.43.2 Mantissa
      44. 8.6.44 READ_IOUT (8Ch)
        1. 8.6.44.1 Exponent
        2. 8.6.44.2 Mantissa
      45. 8.6.45 READ_TEMPERATURE_2 (8Eh)
        1. 8.6.45.1 Exponent
        2. 8.6.45.2 Mantissa
      46. 8.6.46 PMBUS_REVISION (98h)
      47. 8.6.47 MFR_VOUT_MIN (A4h)
        1. 8.6.47.1 Exponent
        2. 8.6.47.2 Mantissa
      48. 8.6.48 IC_DEVICE_ID (ADh)
      49. 8.6.49 IC_DEVICE_REV (AEh)
      50. 8.6.50 MFR_SPECIFIC_00 (D0h)
      51. 8.6.51 OPTIONS (MFR_SPECIFIC_21) (E5h)
        1. 8.6.51.1 PMB_HI_LO
        2. 8.6.51.2 PMB_VTH
        3. 8.6.51.3 EN_ADC_CNTL
        4. 8.6.51.4 VSM
        5. 8.6.51.5 DLO
        6. 8.6.51.6 AVG_PROG[1:0]
        7. 8.6.51.7 EN_AUTO_ARA
        8. 8.6.51.8 SS_DET_DIS
      52. 8.6.52 MISC_CONFIG_OPTIONS (MFR_SPECIFIC_32) (F0h)
        1. 8.6.52.1 OV_RESP_SEL
        2. 8.6.52.2 HSOC_USER_TRIM[1:0]
        3. 8.6.52.3 FORCE_SYNC
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS544C25 4.5-V to 18-V Input, 0.95-V Output, 30-A Converter
      2. 9.2.2 Design Requirements
      3. 9.2.3 Design Procedure
        1. 9.2.3.1  Switching Frequency Selection
        2. 9.2.3.2  Inductor Selection
        3. 9.2.3.3  Output Capacitor Selection
          1. 9.2.3.3.1 Response to a Load Transient
          2. 9.2.3.3.2 Output Voltage Ripple
          3. 9.2.3.3.3 Bus Capacitance
        4. 9.2.3.4  Input Capacitor Selection
        5. 9.2.3.5  Bootstrap Capacitor Selection
        6. 9.2.3.6  BP6 and BP3
        7. 9.2.3.7  R-C Snubber and VIN Pin High-Frequency Bypass
        8. 9.2.3.8  Temperature Sensor
        9. 9.2.3.9  Key PMBus Parameter Selection
          1. 9.2.3.9.1 Enable, UVLO and Sequencing
          2. 9.2.3.9.2 Soft-Start Time
          3. 9.2.3.9.3 Overcurrent Threshold and Response
          4. 9.2.3.9.4 Power Good, Output Overvoltage and Undervoltage Protection
        10. 9.2.3.10 Output Voltage Setting and Frequency Compensation Selection
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Mounting and Thermal Profile Recommendation
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Texas Instruments Fusion Digital Power Designer
        2. 12.1.1.2 TPS40k Loop Compensation Tool
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Power Supply Recommendations

These devices are designed to operate from an input voltage supply between 4.5 V and 18 V. This supply must be well regulated. These devices are not designed for split-rail operation. The VIN and VDD pins must be the same potential for accurate high-side short circuit protection. Proper bypassing of input supplies and internal regulators is also critical for noise performance, as is PCB layout and grounding scheme. See the recommendations in the Layout section.