JAJSIO3A February 2020 – September 2020 TPS546B24A
PRODUCTION DATA
The resistor divider for the ADRSEL pin selects the range of PMBus Addresses and SYNC direction for the TPS546B24A. For Stand Alone devices with only one device supporting a single output voltage, the ADRSEL divider also selects the Phase Shift between SYNC and the switch node.
RESISTOR DIVIDER CODE | SLAVE_ADDRESS | SYNC IN / SYNC OUT | STACK_CONFIG = 0x0000 (STAND-ALONE ONLY) | |
---|---|---|---|---|
— | Range | — | PHASE SHIFT | INTERLEAVE |
Short to AGND | 0x7F (127d) | Auto Detect | 0 | 0x0020 |
Float | EEPROM (0x24h / 36d) | Auto Detect | 0 | 0x0020 |
None | 16d - 31d | Auto detect | 0 | 0x0020 |
0 | 16d - 31d | Sync in | 0 | 0x0040 |
1 | 32d - 47d | Sync in | 0 | 0x0040 |
2 | 16d - 31d | Sync in | 90 | 0x0041 |
3 | 32d - 47d | Sync in | 90 | 0x0041 |
4 | 16d - 31d | Sync in | 120 | 0x0031 |
5 | 32d - 47d | Sync in | 120 | 0x0031 |
6 | 16d - 31d | Sync in | 180 | 0x0042 |
7 | 32d - 47d | Sync in | 180 | 0x0042 |
8 | 16d - 31d | Sync in | 240 | 0x0032 |
9 | 32d - 47d | Sync in | 240 | 0x0032 |
10 | 16d - 31d | Sync in | 270 | 0x0043 |
11 | 32d - 47d | Sync in | 270 | 0x0043 |
12 | 16d - 31d | Sync out | 0 | 0x0020 |
13 | 32d - 47d | Sync out | 0 | 0x0020 |
14 | 16d - 31d | Sync out | 180 | 0x0042 |
15 | 32d - 47d | Sync out | 180 | 0x0042 |
The resistor to AGND for ADRSEL programs the device PMBus slave address according to Table 7-15:
RESISTOR TO AGND CODE | SLAVE ADDRESS (16-31 RANGE) | SLAVE ADDRESS (32-47 RANGE) |
---|---|---|
0 | 0x10h (16d) | 0x20h (32d) |
1 | 0x11h (17d) | 0x21h (33d) |
2 | 0x12h (18d) | 0x22h (34d) |
3 | 0x13h (19d) | 0x23h (35d) |
4 | 0x14h (10d) | 0x24h (36d) |
5 | 0x15h (21d) | 0x25h (37d) |
6 | 0x16h (22d) | 0x26h (38d) |
7 | 0x17h (23d) | 0x27h (39d) |
8 | 0x18h (24d) | 0x48h (72d) |
9 | 0x19h (25d) | 0x29h (41d) |
10 | 0x1Ah (26d) | 0x2Ah (42d) |
11 | 0x1Bh (27d) | 0x2Bh (43d) |
12 | 0x1Ch (28d) | 0x2Ch (44d) |
13 | 0x1Dh (29d) | 0x2Dh (45d) |
14 | 0x1Eh (30d) | 0x2Eh (46d) |
15 | 0x1Fh (31d) | 0x2Fh (47d) |
When a TPS546B24A device is configured as the Master of a multi-phase stack, it will always occupy the zero-degree position in Section 7.6.30, but the ADRSEL resistor divider can still be used to select Auto Detect, Forced SYNC_IN, and Forced SYNC_OUT. When the Master of a multi-phase stack is configured for SYNC_IN, all devices of the stack will remain disabled until a valid external SYNC signal is provided.
Slave devices in a multi-phase stack are always configured for SYNC_IN and will declare a SYNC_FAULT in Section 7.6.62 if enabled before a SYNC input is present or if the SYNC input is lost before being disabled. In order to avoid these false faults due to differences in enable and disable timing between a Master and a Slave device, it is recommended that the Master device of a multi-phase stack be configured for SYNC_OUT rather than Auto-detect if no external SYNC will be used.