JAJSQT1 July 2024 TPS546E25
ADVANCE INFORMATION
| Register Address | 01h |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| NVM Back-up: | No |
| Updates: | On-the-fly |
The OPERATION command is used to enable or disable power conversion, in conjunction input from the enable pin, according to the configuration of the OPERATION command. It is also used to set the output voltage to the upper or lower MARGIN levels, and select soft-stop.
Return to Supported PMBus Commands.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R/W | R/W | R/W | R/W | R/W | R/W | R | R |
| ON | OFF | MARGIN | 0 | 0 | |||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7 | ON | R/W | 0b | Enable/disable power conversion when the command is configured to require input
from the CMD bit for output control. Note that
there can be several other requirements that must
be satisfied before the power conversion can begin
(for example, input voltages above UVLO
thresholds, enable pins high if required by (02h) ON_OFF_CONFIG and so
forth). 0b: Disable power conversion. 1b: Enable power conversion if VIN is greater than the VIN_UVLO threshold, the CMD bit is high, and the SPR in the (02h) ON_OFF_CONFIG register is low, or the CPR is high and the CNTL pin is enabled.When the device is configured as a secondary device, this bit is always set to 1b. |
| 6 | OFF | R/W | 0b | This bit controls the turnoff profile when (02h) ON_OFF_CONFIG is configured to require input from the CMD bit
for output voltage control and OPERATION bit 7 transitions from 1b to 0b 0b: Immediate Off. Power conversion stops immediately and the power stage is forced to a high-Z state. 1b: Soft Off. Power conversion continues for the TOFF_ DELAY time, then the output voltage is ramped down at a slew rate according to TOFF_ FALL. Once the output voltage finishes ramping down, power conversions stops. |
| 5:2 | MARGIN | R/W | 0001b | Sets the margin state. 0000b, 0001b, 0010b: Margin OFF. Output voltage target is (21h) VOUT_COMMAND, OV/UV faults behave normally per their respective fault response settings. 0101b: Margin Low (Ignore Fault if bit 7 is 1b). Output voltage target is Section 7.19. OV/UV faults are ignored and do not trigger shut-down or STATUS updates. 0110b: Margin Low (Act on Fault). Output voltage target is Section 7.19. OV/UV faults trigger per their respective fault response settings. 1001b: Margin High (Ignore Fault). Output voltage target is Section 7.18. OV/UV trigger are ignored and do not trigger shut-down or STATUS update. 1010b: Margin High (Act on Fault). Output voltage target is Section 7.18. OV/UV trigger per their respective fault response settings. Other: Invalid/Unsupported data |
| 1 | Reserved | R | 0b | Not used and always set to 0. |
| 0 | Reserved | R | 0b | Not used and always set to 0. |
Attempts to write OPERATION to any value other than those listed above will be considered invalid/unsupported data and cause the device to respond by flagging the appropriate status bits, and notifying the host according to the PMBus 1.3.1 Part II specification, section 10.9.3.