JAJSSB2 September 2024 TPS548B23
ADVANCE INFORMATION
When the device is configured for external feedback operation with the CFG 3-5 pins (See Table 7-3), the switching frequency, fault recovery mode, overcurrent threshold, and soft-start time are programmed by connecting resistors between the CFG1-2 pins and AGND.
The switching frequency, fault recovery mode, and soft-start time are programmed by connecting a resistor between the CFG1 pin and AGND based on Table 7-2 below:
CFG1 PIN RESISTANCE TO AGND (kΩ) | SWITCHING FREQUENCY (fSW) (kHz)(1) | FAULT RECOVERY MODE | SOFT-START TIME (ms) | |
---|---|---|---|---|
0 (GND) | 600 | Hiccup | 1 | |
4.99 | 800 | Hiccup | 1 | |
7.50 | 1000 | Hiccup | 1 | |
10.5 | 1200 | Hiccup | 1 | |
13.3 | 600 | Latch Off | 1 | |
16.9 | 800 | Latch Off | 1 | |
21.0 | 1000 | Latch Off | 1 | |
24.9 | 1200 | Latch Off | 1 | |
30.1 | 600 | Hiccup | 2 | |
35.7 | 800 | Hiccup | 2 | |
42.2 | 1000 | Hiccup | 2 | |
48.7 | 1200 | Hiccup | 2 | |
56.2 | 600 | Latch Off | 2 | |
64.9 | 800 | Latch Off | 2 | |
75.0 | 1000 | Latch Off | 2 | |
86.6 | 1200 | Latch Off | 2 | |
102 | 600 | Hiccup | 3 | |
118 | 800 | Hiccup | 3 | |
137 | 1000 | Hiccup | 3 | |
158 | 1200 | Hiccup | 3 | |
182 | 600 | Latch Off | 3 | |
210 | 800 | Latch Off | 3 | |
243 | 1000 | Latch Off | 3 | |
≥280 (FLOAT) | 1200 | Latch Off | 3 |
The valley overcurrent protection is programmed with resistor (RILIM) between CFG2 and AGND using based on Equation 2
where
To protect the device from an unexpected connection to the ILIM pin, an internal fixed OCL clamp is implemented. This internal OCL clamp limits the maximum valley current on the low-side MOSFET to 21A when the ILIM pin has too small of a resistance to AGND, or is accidentally shorted to ground.