JAJSDE0A June 2017 – February 2024 TPS549B22
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
ADDR | 32 | I | Program device address and SKIP or FCCM mode. |
AGND | 30 | G | Ground pin for internal analog circuits. |
BOOT | 5 | P | Supply rail for high-side gate driver (boot terminal). Connect boot capacitor from this pin to SW node. Internally connected to BP via bootstrap PMOS switch. |
BP | 31 | O | LDO output |
DRGND | 29 | P | Internal gate driver return. |
EN_UVLO | 4 | I | Enable pin that can turn on the DC/DC switching converter. Use also to program the required PVIN UVLO when PVIN and VDD are connected together. |
ILIM | 36 | I/O | Program overcurrent limit by connecting a resistor to ground. |
MODE | 34 | I | Mode selection pin. Select the control mode, and soft-start timing selection. |
NC | 6, 7, 26, 27 | No connect. | |
PGND | 13, 14, 15, 16, 17, 18, 19, 20 | P | Power ground of internal FETs. |
PGOOD | 35 | O | Open drain power-good status signal. |
PMB_CLK | 3 | I | Clock input for the PMBus interface. |
PMB_DATA | 2 | I/O | Data I/O for the PMBus interface. |
PVIN | 21, 22, 23, 24, 25 | P | Power supply input for integrated power MOSFET pair. |
RSN | 38 | I | Inverting input of the differential remote sense amplifier. |
RSP | 39 | I | Non-inverting input of the differential remote sense amplifier. |
RESV_TRK | 37 | I | Do not connect. |
SMB_ALRT# | 1 | O | Alert output for the PMBus interface. |
SW | 8, 9, 10, 11, 12 | I/O | Output switching terminal of power converter. Connect the pins to the output inductor. |
VDD | 28 | P | Controller power supply input. |
VOSNS | 40 | I | Output voltage monitor input pin. |
VSEL | 33 | I | Program the initial start-up and or reference voltage without feedback resistor dividers (from 0.6 V to 1.2 V in 50-mV increments). |