JAJSJW7C September   2019  – June 2021 TPS54J060

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Enable and Internal LDO
      2. 7.3.2  Split Rail and External LDO
      3. 7.3.3  Output Voltage Setting
      4. 7.3.4  Soft Start and Output-Voltage Tracking
      5. 7.3.5  Frequency and Operation Mode Selection
      6. 7.3.6  D-CAP3 Control
      7. 7.3.7  Current Sense and Positive Overcurrent Protection
      8. 7.3.8  Low-side FET Negative Current Limit
      9. 7.3.9  Power Good
      10. 7.3.10 Overvoltage and Undervoltage Protection
      11. 7.3.11 Out-Of-Bounds Operation (OOB)
      12. 7.3.12 Output Voltage Discharge
      13. 7.3.13 UVLO Protection
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip Eco-Mode Light Load Operation
      2. 7.4.2 Forced Continuous-Conduction Mode
      3. 7.4.3 Pre-Bias Start-up
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Choose the Switching Frequency and Operation Mode (MODE Pin)
        2. 8.2.2.2  Choose the Output Inductor (L)
        3. 8.2.2.3  Set the Current Limit (TRIP)
        4. 8.2.2.4  Choose the Output Capacitors (COUT)
        5. 8.2.2.5  Choose the Input Capacitors (CIN)
        6. 8.2.2.6  Feedback Network (FB Pin)
        7. 8.2.2.7  Soft Start Capacitor (SS/REFIN Pin)
        8. 8.2.2.8  EN Pin Resistor Divider
        9. 8.2.2.9  VCC Bypass Capacitor
        10. 8.2.2.10 BOOT Capacitor
        11. 8.2.2.11 Series BOOT Resistor and RC Snubber
        12. 8.2.2.12 PGOOD Pullup Resistor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 サポート・リソース
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Trademarks
    5. 11.5 Glossary
    6. 11.6 Electrostatic Discharge Caution
  12. 12Mechanical, Packaging, and Ordering Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.8 EN Pin Resistor Divider

A resistor divider on the EN pin can be used to increase the input voltage that the converter begins its start-up sequence. Increasing the input voltage the converter starts up at can be useful in high output voltage applications. The resistor divider can be selected so the converter starts switching after the input voltage is greater than the output voltage. If the output voltage comes up before the input voltage is sufficient, UVP can be tripped and cause the converter to latch off.

To set the start voltage, first select the bottom resistor (REN_B). The recommended value is between 1 kΩ and 100 kΩ. There is an internal pulldown resistance with a nominal value of 6 MΩ and this must be included for the most accurate calculations. This is especially important when the bottom resistor is a higher value, near 100 kΩ. This example uses a 100-kΩ resistor and this combined with the internal resistance in parallel results in an equivalent bottom resistance of 98.4 kΩ. The top resistor value for the target start voltage is calculated with Equation 29. In this example, the nearest standard value of 499 kΩ is selected for REN_T.

Equation 29. GUID-423F2F29-F00B-4D76-901A-F0D0A5D616A2-low.gif

The start and stop voltages with the selected EN resistor divider can be calculated with Equation 28 and Equation 31.

Equation 30. GUID-033D5FC0-CAC0-488B-9634-DEA9CB1E95E7-low.gif
Equation 31. GUID-05D550CC-E234-40E2-9A58-ED3D69818FA0-low.gif