JAJSGT7B May   2013  – January 2019 TPS55330

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション(昇圧)
      2.      効率と出力電流との関係
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operation
      2. 7.3.2 Switching Frequency
      3. 7.3.3 Overcurrent Protection and Frequency Foldback
        1. 7.3.3.1 Minimum On-Time and Pulse Skipping
      4. 7.3.4 Voltage Reference and Setting Output Voltage
      5. 7.3.5 Soft-Start
      6. 7.3.6 Slope Compensation
      7. 7.3.7 Enable and Thermal Shutdown
      8. 7.3.8 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VI < 2.9 V (Minimum VI)
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Operation at Light Loads
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Selecting the Switching Frequency (R4)
        3. 8.2.2.3  Determining the Duty Cycle
        4. 8.2.2.4  Selecting the Inductor (L1)
        5. 8.2.2.5  Computing the Maximum Output Current
        6. 8.2.2.6  Selecting the Output Capacitor (C8-C10)
        7. 8.2.2.7  Selecting the Input Capacitors (C2, C7)
        8. 8.2.2.8  Setting Output Voltage (R1, R2)
        9. 8.2.2.9  Setting the Soft-start Time (C7)
        10. 8.2.2.10 Selecting the Schottky Diode (D1)
        11. 8.2.2.11 Compensating the Control Loop (R3, C4, C5)
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
        1. 11.1.2.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

VIN = 5 V, TJ = –40°C to +150°C, unless otherwise noted. Typical values are at TA = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VIN Input voltage range 2.9 16 V
IQ Operating quiescent current into VIN Device non-switching, VFB = 2 V 0.5 mA
ISD Shutdown current EN = GND 2.7 10 µA
VUVLO Under-voltage lockout threshold VIN falling 2.5 2.7 V
Vhys Under-voltage lockout hysteresis 120 140 160 mV
ENABLE AND REFERENCE CONTROL
VEN(r) EN threshold voltage EN rising input 0.9 1.08 1.30 V
VEN(f) EN threshold voltage EN falling input 0.74 0.92 1.125 V
VENh EN threshold hysteresis 0.16 V
REN EN pulldown resistor 400 950 1600 kΩ
Toff Shutdown delay, SS discharge EN high to low 1.0 ms
VSYNh SYN logic high voltage 1.2
VSYNl SYN logic low voltage 0.4 V
VOLTAGE AND CURRENT CONTROL
VREF Voltage feedback regulation voltage 1.204 1.229 1.254 V
TA = 25°C 1.220 1.229 1.238
IFB Voltage feedback input bias current TA = 25°C 1.6 20 nA
Isink Comp pin sink current VFB = VREF + 200 mV, VCOMP = 1 V 42 µA
Isource Comp pin source current VFB = VREF – 200 mV, VCOMP = 1 V 42 µA
VCCLP Comp pin Clamp Voltage High Clamp, VFB = 1 V
Low Clamp, VFB = 1.5 V
3.1
0.75
V
VCTH Comp pin threshold Duty cycle = 0% 1.04 V
Gea Error amplifier transconductance 240 360 440 µS
Rea Error amplifier output resistance 10
fea Error amplifier crossover frequency 500 kHz
FREQUENCY
fSW Frequency RFREQ = 480 kΩ 75 94 130 kHz
RFREQ = 80 kΩ 460 577 740
RFREQ = 40 kΩ 920 1140 1480
Dmax Maximum duty cycle VFB = 1.0 V, RFREQ = 80 kΩ 89% 96%
VFREQ FREQ pin voltage 1.25 V
Tmin_on Minimum on pulse width RFREQ = 80 kΩ 77 ns
POWER SWITCH
RDS(ON) N-channel MOSFET on-resistance VIN = 5 V
VIN = 3 V
60
70
110
120
ILN_NFET N-channel leakage current VDS = 25 V, TA = 25°C 2.1 µA
OCP and SS
ILIM N-Channel MOSFET current limit D = Dmax 5.25 6.6 7.75 A
ISS Soft-start bias current VSS = 0 V 6 µA
THERMAL SHUTDOWN
Tshutdown Thermal shutdown threshold 165 °C
Thysteresis Thermal shutdown threshold hysteresis 15 °C