JAJSRV2A April 2024 – June 2024 TPS561243 , TPS561246
PRODUCTION DATA
The TPS56124x implements D-CAP3 control scheme that supports adaptive on-time pulse width modulation (PWM) control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration, with both low-ESR and ceramic output capacitors. The D-CAP3 control scheme is stable even with virtually no ripple at the output. The TPS56124x also includes an error amplifier that makes the output voltage very accurate.
At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after the internal one shot timer expires. This one shot duration is set proportional to the output voltage, VO, and inversely proportional to the converter input voltage, VIN, to maintain a pseudo-fixed frequency over the input voltage range, hence called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the reference voltage. An internal ramp is added to reference voltage to simulate output ripple, eliminating the need for ESR induced output ripple from D-CAP3 control scheme.