The output overcurrent limit (OCL) is implemented using a cycle-by-cycle valley detect control circuit. The switch current is monitored during the OFF state by measuring the low-side FET drain to source voltage. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated.

During the on time of the high-side FET switch, the switch current increases at a linear rate determined by Vin, Vout, the on-time and the output inductor value. During the on time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current I_out. If the monitored current is above the OCL level, the converter maintains low-side FET on and delays the creation of a new set pulse, even the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner.

There are some important considerations for this type of overcurrent protection. The load current is higher than the overcurrent threshold by one half of the peak-to-peak inductor ripple current. Also, when the current is being limited, the output voltage tends to fall as the demanded load current can be higher than the current available from the converter. This action even can cause the output voltage to fall. When the FB voltage falls below the UVP threshold voltage, the UVP comparator detects the fall. And then, the device shuts down after the UVP delay time and re-starts after the hiccup time.

When the overcurrent condition is removed, the output voltage returns to the regulated value.

The TPS563206 is an FCCM mode part. In this mode, the device has negative inductor current at light loading. The device has NOC (negative overcurrent) protection to avoid too large negative current. NOC protection detects the valley of inductor current. When the valley value of inductor current exceeds the NOC threshold, the IC turns off the low side then turns on the high side. When NOC protection is triggered eight times continuously, IC turns off both high side FET and low side FET. When the NOC condition is removed and output voltage returns to target value, the device returns to normal switching.

Because the TPS563206 is an FCCM mode port, if the inductance is so small that the device trigger NOC, this action causes output voltage to be higher than target value. The minimum inductance is identified as Equation 2.