JAJSOQ5 データシート

JAJSOQ5A March 2023 – January 2024 TPS563203 , TPS563206

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

DRL|6
- MPDS159H

サーマルパッド・メカニカル・データ

発注情報

jajsoq5a_oa

7.2.2.3 Output Filter Selection

The LC filter used as the output filter has a double pole at Equation 4. In this equation, C_OUT must use the effective value after derating, not the nominal value.

Equation 4.

{F r e q u e n c y}_{d o u b l e p o l e} = \frac{1}{2 \times π \times \sqrt{L_{O U T} \times C_{O U T}}}

For any control topology that is compensated internally, there is a range of the output filter the control topology can support. At low frequency, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the device. The low frequency phase is 180°. At the output filter pole frequency, the gain rolls off at a –40dB per decade rate and the phase drops has a 180 degree drop. The internal ripple generation network introduces a high-frequency zero that reduces the gain roll off from –40dB to –20dB per decade and leads the 90 degree phase boost. The internal ripple injection high-frequency zero is about 41kHz. TI recommends the inductor and capacitor selected for the output filter that the double pole is located about 20kHz, so that the phase boost provided by this high-frequency zero provides adequate phase margin for the stability requirement. For higher than 2V output voltage, TI suggests to add a CFF (Cap of Feed Forward) C4 in schematic to increase the bandwidth and phase margin. The suggested CFF range is 10pF to 100pF. The crossover frequency of the overall system must usually be targeted to be less than one-third of the switching frequency.

Table 7-2 Recommended Component Values

OUTPUT VOLTAGE (V)	R1 (kΩ)	R2 (kΩ)	Min L(uH)	TYP L (uH)	Max L(uH)	Min Cout(uF)	Typ Cout(uF)	Max Cout(uF)	Typ CFF(pF)
0.8	3.33	10.0	1.2	1.5	3.3	22	66	110	-
1.05	7.5	10.0	1.2	2.2	3.3	22	44	110	-
2.5	95.0	30.0	2.2	3.3	4.7	22	44	110	10
3.3	135.0	30.0	3.3	4.7	6.8	22	44	110	18
5	220.0	30.0	3.3	4.7	6.8	22	44	110	18
7	320.0	30.0	3.3	4.7	6.8	22	44	110	18

Use Equation 5, Equation 6, and Equation 7 to calculate the inductor peak-to-peak ripple current, peak current and RMS current. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current.

Equation 5.

{I I}_{P - P} = \frac{V_{O U T}}{V_{I N (M a x)}} \times \frac{V_{I N (M a x)} - V_{O U T}}{L_{O U T} \times f_{S W}}

Equation 6.

{I I}_{P E A K} = I_{O} + \frac{{I I}_{P - P}}{2}

Equation 7.

I_{L O (R M S)} = \sqrt{I_{O}^{2} + \frac{1}{12} \times {I I}_{P - P}^{2}}

For this design example, the calculated peak current is 3.68A and the calculated RMS current is 3.03A. The inductor used is a WE 74437349022.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS563203 are intended for use with ceramic or other low ESR capacitors. TI recommends to use 2 × 22µF output cap. Use Equation 8 to determine the required RMS current rating for the output capacitor.

Equation 8.

I_{C O (R M S)} = \frac{V_{O U T} \times (V_{I N} - V_{O U T})}{\sqrt{12} \times V_{I N} \times L_{O U T} \times f_{S W}}

For this design, two MuRata GRM21BR61A226ME44L 22µF output capacitors are used. The typical ESR is 2mΩ each. The calculated RMS current is 0.286A and each output capacitor is rated for 4A.