JAJSCL3C October   2016  – August 2023 TPS568215

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  PWM Operation and D-CAP3 Control Mode
      2. 7.3.2  Eco-mode Control
      3. 7.3.3  4.7 V LDO and External Bias
      4. 7.3.4  MODE Selection
      5. 7.3.5  Soft Start and Pre-biased Soft Start
      6. 7.3.6  Enable and Adjustable UVLO
      7. 7.3.7  Power Good
      8. 7.3.8  Overcurrent Protection and Undervoltage Protection
      9. 7.3.9  Out-of-Bounds Operation
      10. 7.3.10 UVLO Protection
      11. 7.3.11 Thermal Shutdown
      12. 7.3.12 Output Voltage Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Light Load Operation
      2. 7.4.2 Standby Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Component Selection
          1. 8.2.2.1.1 Output Voltage Set Point
          2. 8.2.2.1.2 Switching Frequency and Mode Selection
          3. 8.2.2.1.3 Inductor Selection
          4. 8.2.2.1.4 Output Capacitor Selection
          5. 8.2.2.1.5 Input Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
      2. 9.1.2 Development Support
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The TPS568215 is a high-density, synchronous, step-down buck converter which can operate from 4.5-V to 17-V input voltage (VIN). The device has 19-mΩ and 9-mΩ integrated MOSFETs that enable high efficiency up to 8 A. The device employs D-CAP3™ control mode that provides fast transient response with no external compensation components and an accurate feedback voltage. The control topology provides seamless transition between FCCM operating mode at higher load condition and DCM/Eco-mode™ operation at lighter load condition. DCM/Eco-mode™ allows the TPS568215 to maintain high efficiency at light load. The TPS568215 is able to adapt to both low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.

The TPS568215 has three selectable switching frequencies (FSW) 400 kHz, 800 kHz, and 1200 kHz which gives the flexibility to optimize the design for higher efficiency or smaller size. There are two selectable current limits. All these options are configured by choosing the right voltage on the MODE pin.

The TPS568215 has a 4.7-V internal LDO that creates bias for all internal circuitry. There is a feature to overdrive this internal LDO with an external voltage on the VREG5 pin which improves the converter efficiency. The undervoltage lockout (UVLO) circuit monitors the VREG5 pin voltage to protect the internal circuitry from low input voltages. The device has an internal pullup current source on the EN pin which can enable the device even with the pin floating.

Soft-start time can be selected by connecting a capacitor to the SS pin. The device is protected from output short, undervoltage, and overtemperature conditions.