JAJSOG6 October 2022 TPS568231
PRODUCTION DATA
The power-good (PGOOD) pin is an open-drain output. After the FB pin voltage is between 93% and 108% of the internal reference voltage (VREF), PGOOD is de-asserted and floats after a 14-µs de-glitch time. TI recommends a 10-kΩ pullup resistor to pull it up to VREG5. The PGOOD pin is pulled low when the FB pin voltage is lower than VUVP or greater than VOVP threshold, in an event of thermal shutdown, or during the soft-start period.