SLVS258B November   1999  – December 2016 TPS60130 , TPS60131 , TPS60132 , TPS60133

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Operating Principle
      2. 9.3.2 Adaptive Mode Switching
      3. 9.3.3 Pulse-Skip Mode
      4. 9.3.4 Start-Up Procedure
      5. 9.3.5 Shutdown
      6. 9.3.6 Undervoltage Lockout
      7. 9.3.7 Low Battery Detector (TPS60130 and TPS60132)
      8. 9.3.8 Power Good Detector (TPS60131 and TPS60133)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Paralleling of Two TPS6013x to Deliver 600-mA Total Output Current
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Capacitor Selection
        3. 10.2.1.3 Application Curves
      2. 10.2.2 TPS6013x Operated With Ultra-Low Quiescent Current
        1. 10.2.2.1 Design Requirements
      3. 10.2.3 Regulated Discharge of the Output Capacitors After Disabling of the TPS6013x
        1. 10.2.3.1 Design Requirements
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Power Dissipation
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

12 Layout

12.1 Layout Guidelines

Careful board layout is necessary due to the high transient currents and switching frequency of the converter. All capacitors must be soldered in close proximity to the IC. Connect ground and power ground pins through a short, low-impedance trace. A PCB layout proposal for a two-layer board is given in Figure 33. The bottom layer of the board carries only ground potential for best performance. The layout also provides improved thermal performance as the exposed lead frame is soldered to the PCB.

An evaluation module for the TPS60130 is available and can be ordered under product code TPS60130EVM-143. The EVM uses the layout shown in Figure 33 and components in Table 7.

The best performance of the converter is achieved with the additional bypass capacitors C5 and C6 at input and output. Capacitor C7 must be included if the large line transients are expected. The capacitors are not required. They can be omitted in most applications.

12.2 Layout Example

TPS60130 TPS60131 TPS60132 TPS60133 TPS60130_DS-drawing.gif Figure 33. Recommended PCB Layout for TPS6013x

Table 7. Component Identification

COMPONENT DESCRIPTION
IC1 TPS6013x
C1, C2 Flying capacitors
C3, C6 Input capacitors
C4, C5 Onput capacitors
C7 Stabilization capacitor for LBI
R1, R2 Resistive divider for LBI
R3 Pullup resistor for LBO

12.3 Power Dissipation

The power dissipated in the TPS6013x depends on output current and the mode of operation (1.5× or doubler voltage conversion mode). It is described by Equation 5.

Equation 5. TPS60130 TPS60131 TPS60132 TPS60133 equation_06_SLVS258A.gif

PDISS must be less than that allowed by the package rating. See Absolute Maximum Ratings for 20-pin PWP package power-dissipation limits and deratings.

TPS60130 TPS60131 TPS60132 TPS60133 graph_02_SLVS258A.gif Figure 34. Dissipation Derating Curves
vs Free-Air Temperature
TPS60130 TPS60131 TPS60132 TPS60133 graph_03_SLVS258A.gif Figure 35. Maximum Continuous Dissipation
vs Case Temperature