SLVSB50C December   2011  – June 2020 TPS61087-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Frequency Select Pin (FREQ)
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Thermal Shutdown
      5. 7.3.5 Overvoltage Prevention
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Circuit: 5 V to 15 V (fS = 1.2 MHz)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Rectifier Diode Selection
          3. 8.2.1.2.3 Setting the Output Voltage
          4. 8.2.1.2.4 Compensation (COMP)
          5. 8.2.1.2.5 Input Capacitor Selection
          6. 8.2.1.2.6 Output Capacitor Selection
      2. 8.2.2 Application Curves
      3. 8.2.3 Other Application Circuit Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.1.2.4 Compensation (COMP)

The regulator loop can be compensated by adjusting the external components connected to the COMP pin. The COMP pin is the output of the internal transconductance error amplifier.

Equation 9 can be used to calculate RCOMP and CCOMP.

Equation 9. TPS61087-Q1 q3_1_lvs821.gif

where

  • Cout is the output capacitance.

Make sure that RCOMP < 120 kΩ and CCOMP > 820 pF, independent of the results of the above formulas.

See Table 5 for dedicated compensation networks giving an improved load transient response. These conservative RCOMP and CCOMP values for certain inductors, input, and output voltages provide a very stable system. For a faster response time, a higher RCOMP value can be used to enlarge the bandwidth, as well as a slightly lower value of CCOMP to keep enough phase margin. These adjustments must be performed in parallel with the load transient response monitoring of TPS61087-Q1.

Standard values of RCOMP = 16 kΩ and CCOMP = 2.7 nF works for the majority of the applications.

Table 5. Recommended Compensation Network Values at High and Low Frequency

FREQUENCY L VS VIN ± 20% RCOMP CCOMP
High (1.2 MHz) 3.3 μH 15 V 5 V 100 kΩ 820 pF
3.3 V 91 kΩ 1.2 nF
12 V 5 V 68 kΩ 820 pF
3.3 V 68 kΩ 1.2 nF
9 V 5 V 39 kΩ 820 pF
3.3 V 39 kΩ 1.2 nF
Low (650 kHz) 6.8 μH 15 V 5 V 51 kΩ 1.5 nF
3.3 V 47 kΩ 2.7 nF
12 V 5 V 33 kΩ 1.5 nF
3.3 V 33 kΩ 2.7 nF
9 V 5 V 18 kΩ 1.5 nF
3.3 V 18 kΩ 2.7 nF