JAJS467F December   2008  – April 2019 TPS61175

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switching Frequency
      2. 7.3.2 Soft Start
      3. 7.3.3 Overcurrent Protection
      4. 7.3.4 Enable and Thermal Shutdown
      5. 7.3.5 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Minimum ON Time and Pulse Skipping
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design with WEBENCH Tools
        2. 8.2.2.2  Determining the Duty Cycle
        3. 8.2.2.3  Selecting the Inductor
        4. 8.2.2.4  Computing the Maximum Output Current
        5. 8.2.2.5  Setting Output Voltage
        6. 8.2.2.6  Setting the Switching Frequency
        7. 8.2.2.7  Setting the Soft-Start Time
        8. 8.2.2.8  Selecting the Schottky Diode
        9. 8.2.2.9  Selecting the Input and Output Capacitors
        10. 8.2.2.10 Compensating the Small Signal Control Loop
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 開発サポート
      1. 11.2.1 WEBENCHツールによるカスタム設計の作成
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.2 Soft Start

The TPS61175 has a built-in soft start circuit which significantly reduces the start-up current spike and output voltage overshoot. When the IC is enabled, an internal bias current (6 μA typically) charges a capacitor (C3) on the SS pin. The voltage at the capacitor clamps the output of the internal error amplifier that determines the duty cycle of PWM control, thereby the input inrush current is eliminated. Once the capacitor reaches 1.8 V, the soft start cycle is completed and the soft-start voltage no longer clamps the error amplifier output. Refer to Figure 16 for the soft start waveform. See Table 3 for C3 and corresponding soft start time. A 47-nF capacitor eliminates the output overshoot and reduces the peak inductor current for most applications.

Table 3. Soft-Start Time vs C3

VIN (V) VOUT(V) LOAD (A) COUT (μF) fSW (MHz) C3 (nF) tSS(ms) OVERSHOT (mV)
5 24 0.4 10 1.2 47 4 none
10 0.8 210
12 35 0.6 10 2 100 6.5 none
10 0.4 300

When the EN is pulled low for 10 ms, the IC enters shutdown and the SS capacitor discharges through a 5-kΩ resistor for the next soft start.