JAJSVH7A October   2024  – November 2024 TPS61287

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable and Start-up
      2. 6.3.2 Undervoltage Lockout (UVLO)
      3. 6.3.3 Programmable EN/UVLO
      4. 6.3.4 Switching Valley Current Limit
      5. 6.3.5 External Clock Synchronization
      6. 6.3.6 Stackable Multi-phase Operation
      7. 6.3.7 Device Functional Modes
        1. 6.3.7.1 Forced PWM Mode
        2. 6.3.7.2 Auto PFM Mode
      8. 6.3.8 Overvoltage Protection
      9. 6.3.9 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting Output Voltage
        2. 7.2.2.2 Inductor Selection
        3. 7.2.2.3 Bootstrap And VCC Capacitors Selection
        4. 7.2.2.4 MOSFET Selection
        5. 7.2.2.5 Input Capacitor Selection
        6. 7.2.2.6 Output Capacitor Selection
        7. 7.2.2.7 Loop Stability
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
        1. 7.4.2.1 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.3 Programmable EN/UVLO

The TPS61287 has a dual function enable and undervoltage lockout (UVLO) circuit at EN/UVLO pin. When the voltage at the VIN and VCC pin is above the rising threshold of UVLO and the EN/UVLO pin is pulled above 1.18V but below the enable EN/UVLO threshold of 1.23V, the TPS61287 is enabled but still in standby mode.

The EN/UVLO pin has an accurate UVLO voltage threshold to support programmable input undervoltage lockout with hysteresis. When the EN/UVLO pin voltage is greater than the UVLO threshold of 1.23V, the TPS61287 is enabled for switching operation. A hysteresis current, IUVLO_HYS, is sourced out of the EN/UVLO pin to provide a hysteresis that prevents on/off chatter in the presence of noise with a slowly changing input voltage.

By using resistor divider as shown in Figure 6-1, the turn-on threshold is calculated using Equation 1.

Equation 1. TPS61287

where

  • VUVLO is the UVLO threshold of 1.23V at the EN/UVLO pin.

The hysteresis between the UVLO turn-on threshold and turn-off threshold is set by the upper resistor in the EN/UVLO resistor divider and is given by Equation 2.

Equation 2. TPS61287

where

  • IUVLO_HYS is the sourcing current from the EN/UVLO pin when the voltage at the EN/UVLO pin is above VUVLO.
TPS61287 Programmable UVLO With Resistor Divider at the EN/UVLO Pin Figure 6-1 Programmable UVLO With Resistor Divider at the EN/UVLO Pin

By using an NMOSFET together with a resistor divider the user can implement both logic enable and programmable UVLO as shown in Figure 6-2. The EN logic high level must be greater than the enable threshold plus the Vth of the NMOSFET Q1. The Q1 also eliminates the leakage current from VIN to ground through the UVLO resistor divider during shutdown mode.

TPS61287 Logic Enable and Programmable UVLO Figure 6-2 Logic Enable and Programmable UVLO