JAJSEC9D May   2014  – January 2018 TPS6213013A-Q1 , TPS62130A-Q1 , TPS62133A-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの回路図
      2.      効率と出力電流との関係
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Pulse Width Modulation (PWM) Operation
      2. 9.3.2  Power Save Mode Operation
      3. 9.3.3  100% Duty-Cycle Operation
      4. 9.3.4  Enable / Shutdown (EN)
      5. 9.3.5  Soft Start / Tracking (SS/TR)
      6. 9.3.6  Current Limit And Short Circuit Protection
      7. 9.3.7  Power Good (PG)
      8. 9.3.8  Pin-Selectable Output Voltage (DEF)
      9. 9.3.9  Frequency Selection (FSW)
      10. 9.3.10 Under Voltage Lockout (UVLO)
      11. 9.3.11 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation Above TJ=125°C
      2. 9.4.2 Operation with VIN < 3V
      3. 9.4.3 Operation with Separate EN Control
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 TPS62130A-Q1 Point-Of-Load Step Down Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 10.2.1.2.2 Programming The Output Voltage
          3. 10.2.1.2.3 External Component Selection
          4. 10.2.1.2.4 Inductor Selection
          5. 10.2.1.2.5 Output Capacitor
          6. 10.2.1.2.6 Input Capacitor
          7. 10.2.1.2.7 Soft Start Capacitor
          8. 10.2.1.2.8 Tracking Function
          9. 10.2.1.2.9 Output Filter And Loop Stability
        3. 10.2.1.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Regulated Power LED Supply
      2. 10.3.2 Inverting Power Supply
      3. 10.3.3 Active Output Discharge
      4. 10.3.4 Various Output Voltages
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 関連リンク
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGT|16
サーマルパッド・メカニカル・データ
発注情報

10.2.1.2.6 Input Capacitor

For most applications, 10µF is sufficient and is recommended, though a larger value reduces input current ripple further. The input capacitor buffers the input voltage during transient events and also decouples the converter from the supply. A low ESR multilayer ceramic capacitor is recommended for best filtering and should be placed between PVIN and PGND as close as possible to those pins. Even though AVIN and PVIN must be supplied from the same input source, it's required to place a capacitance of 0.1uF from AVIN to AGND, to avoid potential noise coupling. An RC, low-pass filter from PVIN to AVIN may be used but is not required.