SLVS848D July 2009 – October 2015 TPS62620 , TPS62621 , TPS62622 , TPS62623 , TPS62624 , TPS62625
PRODUCTION DATA.
As for all switching power supplies, the layout is an important step in the design. High-speed operation of the TPS6262x devices demand careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, stability and switching frequency issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and short traces for the main current paths.
The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. In order to get an optimum ESL step, the output voltage feedback point (FB) should be taken in the output capacitor path, approximately 1 mm away from it. The feed-back line should be routed away from noisy components and traces (e.g. SW line).
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependant issues such as thermal coupling, airflow, added heat sinks, and convection surfaces, and the presence of other heat-generating components, affect the power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
The maximum recommended junction temperature (TJ) of the TPS6262x devices is 105°C. The thermal resistance of the 6-pin CSP package (YFF-6) is RθJA = 125°C/W. Regulator operation is specified to a maximum steady-state ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 160 mW.